US 8,020,131 B1 · Method and apparatus for mapping flip-flop logic onto shift register logic

Abstract

Method and apparatus for mapping flip-flop logic onto shift register logic is described. In one example, a method of processing flip-flop logic in a circuit design for implementation in an integrated circuit is provided. A chain of flip-flops in the circuit design is identified. The chain of flip-flops includes first and second control signals. A shift register is instantiated in a logical description of the circuit design for the chain of flip-flops. A shift register is instantiated in the logical description for the chain of flip-flops. First and second control chains of flip-flops are instantiated in the logical description for the first and second control signals, respectively. A multiplexer is instantiated in the logical description and is configured to select among an output of the shift register, an asserted logic state, and a de-asserted logic state based on outputs of the first and second control chains.

Claims19

Dependent claims

A method of implementing a circuit design for an integrated circuit, comprising:

translating a behavioral description of the circuit design into a logical description based on an architecture of the integrated circuit;
identifying, during the translation, a chain of flip-flops in the circuit design, the chain of flip-flops including first and second control signals;
instantiating, in the logical description, a shift register for the chain of flip-flops;
instantiating, in the logical description, first and second control chains of flip-flops for the first and second control signals, respectively;
instantiating, in the logical description, a multiplexer configured to select among an output of the shift register, an asserted logic state, and a de-asserted logic state based on outputs of the first and second control chains;
and
generating an implementation of the circuit design for the integrated circuit from the logical description,
wherein the translating, identifying, instantiating the shift register, instantiating the first and second control chains, instantiating the multiplexer, and generating are performed by a computer.

5 more elements

An apparatus for implementing a circuit design for an integrated circuit, comprising:

a non-transitory computer-readable medium storing a synthesis tool configured to:
translate a behavioral description of the circuit design into a logical description based on an architecture of the integrated circuit,
identify, during the translation, a chain of flip-flops in the circuit design, the chain of flip-flops including first and second control signals;
instantiate, in the logical description, a shift register for the chain of flip-flops;
instantiate, in the logical description, first and second control chains of flip-flops for the first and second control signals, respectively;
instantiate, in the logical description, a multiplexer configured to select among an output of the shift register, an asserted logic state, and a de-asserted logic state based on outputs of the first and second control chains;
and
an implementation tool configured to generate an implementation of the circuit design for the integrated circuit from the logical description.

5 more elements

A system, comprising:

means for translating a behavioral description of a circuit design into a logical description based on an architecture of an integrated circuit;
means for identifying, during the translation, a chain of flip-flops in the circuit design, the chain of flip-flops including first and second control signals;
means for instantiating, in the logical description, a shift register for the chain of flip-flops;
means for instantiating, in the logical description, first and second control chains of flip-flops for the first and second control signals, respectively;
means for instantiating, in the logical description, a multiplexer configured to select among an output of the shift register, an asserted logic state, and a de-asserted logic state based on outputs of the first and second control chains;
and
means for generating an implementation of the circuit design for the integrated circuit from the logical description.

4 more elements

Dependencies are inferred from the claim text.

Method and apparatus for mapping flip-flop logic onto shift register logic

Life of this patent

Method and apparatus for mapping flip-flop logic onto shift register logic

Life of this patent

Abstract

Claims19