On-line memory testing
AssigneeHewlett-Packard Development Company, L.P.
InventorsLidia Warnes, Siamak Tavallaei
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Abstract
A method of testing on-line and spare memory is disclosed. Such memory may currently store in-use data at some addresses. The testing is initiated upon an occurrence of a pre-selected condition. An address range is determined that excludes at least the addresses currently storing functional data. The address range is subjected to a test pattern, and errors in the address range are reported.
Claims20
A method of performing on-line memory testing on a computing device having a processor and a memory, comprising:
- initiating the on-line memory testing, with a boot monitor included in a hardware of the computing device, wherein the on-line memory testing is initiated upon an occurrence of a pre-selected condition and wherein the memory includes a first address range including spare memory and a second address range currently storing functional data;
- determining the first address range with the processor;
- subjecting the first address range to a test data with the processor;
- and
- reporting errors in the first address range with the processor.
A system for performing on-line memory testing, comprising:
- a memory system including standard and spare memory;
- a counter configured to determine a pre-selected condition;
- and
- a device including a firmware coupled to the counter such that the counter can call the device to initiate a memory test on the spare memory while the memory system is on-line.
A computing platform, comprising:
- a system memory initialized as standard memory and spare memory;
- a boot monitor included in the standard memory;
- and
- a device containing a memory test configured to be initiated by the boot monitor, wherein the device is configured to operate the memory test on the spare memory while the system memory is on-line.
Dependencies are inferred from the claim text.