Validation of computer interconnects

A system for validating computer interconnects comprising:

• a central processing unit (CPU), said CPU being interconnected functionally via a system bus to:
• an input/output (I/O) adapter connecting to at least one of a removable data storage device, a program storage device, and a mass data storage device;
• a user interface adapter connecting to one or more computer input devices;
• a display adapter connecting to a display device;
• and
• at least one memory device thereupon stored a set of instructions which, when executed by said CPU, causes said system to:
• calculate a cable interconnect table associated with the multi-cluster computer;
• distribute the cable interconnect table to a first transceiver in a first computer cluster and a second transceiver in a second computer cluster;
• transmit a first neighbor identification from the first cluster through a cable to the second cluster, and a second neighbor identification from the second cluster through the cable to the first cluster;
• compare the first neighbor identification with a desired first neighbor identification from the cable interconnect table to establish a first comparison result and the second neighbor identification with a desired second identification from the cable interconnect table to establish a second comparison result;
• and
• generate an alert based on the first and second comparison results;
• set a timer to a first time limit whenever the second neighbor identification is not received at the first transceiver;
• and
• generate an alert whenever the second neighbor identification is not received at the first transceiver at the expiration of the time limit.