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US 8,020,038 B2Granted
System and method for adjusting operating points of a processor based on detected processor errors
AssigneeHewlett-Packard Development Company, L.P.
InventorsReid J. Riedlinger, Steven F. Liepe, Douglas John Cutter
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Abstract
A processor comprises a processor core and a controller. The processor core has an execution unit configured to execute instructions and to attempt to perform at least one operation in executing one of the instructions. The processor core is configured to detect a processor error associated with the at least one operation. The controller is configured to change an operating point of the processor core in response to a detection of the processor error such that the processor core operates at a new operating point, and the processor core is configured to retry the at least one operation while the processor core is operating at the new operating point.
Claims15
A processor, comprising:
- a processor core having an execution unit configured to execute instructions and to attempt to perform at least one operation in executing one of the instructions, the processor core configured to detect a processor error associated with the at least one operation, receive power supplied by a power signal from a power source, and receive a clock signal from a clock;
- memory configured to store data indicative of an allowable operating range of operating points for the processor core;
- and
- a controller configured to control the power source to control an amount of power supplied by the power signal and control the clock to control a frequency of the clock signal provided to the processor core based on the data to maintain the allowable operating range and configured to control the power source to reduce the amount of power supplied by the power signal and control the clock to reduce the frequency of the clock signal provided to the processor core to thereby change an operating point of the processor core in response to a detection of the processor error such that the processor core operates at a new operating point,
- wherein the processor core is configured to retry the at least one operation while the processor core is operating at the new operating point,
- wherein the processor is configured to update the data based on detection of one or more processor errors.
3 more elements
A computer system, comprising:
- a processor core having an execution unit configured to execute instructions and to attempt to perform at least one operation in executing one of the instructions, the processor core configured to detect a processor error associated with the at least one operation, receive power supplied by a power signal from a power source, and receive a clock signal from a clock;
- memory for storing data indicative of an allowable operating range of operating points for the processor core;
- means for controlling the clock to control a frequency of the clock signal and the power source to control an amount of power supplied by the power signal provided to the processor core based on the data to maintain the allowable operating range and for controlling the clock to reduce the frequency of the clock signal and the power source to reduce the amount of power supplied by the power signal provided to the processor core to thereby transition the processor core to a new operating point in response to a detection of the processor error;
- and
- means for causing the processor core to retry the at least one operation once the processor core has been transitioned to the new operating point,
- wherein the processor is configured to update the data based on detection of one or more processor errors.
3 more elements
A method for use in a processor-based system, comprising:
- executing instructions via a processor core, the executing comprising attempting to perform at least one operation while the processor core is operating at a first operating point;
- receiving, at the processor core, power supplied by a power signal from a power source;
- receiving, at the processor core, a clock signal from a clock;
- storing data indicative of an allowable operating range of operating points for the processor core;
- controlling the clock to control a frequency of the clock signal and the power source to control an amount of power supplied by the power signal provided to the processor core based on the data to maintain the allowable operating range;
- detecting a processor error resulting from the attempting to perform the at least one operation;
- controlling the clock to reduce the frequency of the clock signal and the power source to reduce the amount of power supplied by the power signal provided to the processor core to thereby transition the processor core to a second operating point in response to the detecting;
- causing the processor core to retry the at least one operation while the processor core is operating at the second operating point;
- and
- updating the data based on detecting one or more processor errors.
7 more elements
Dependencies are inferred from the claim text.