Memory-hazard detection and avoidance instructions for vector processing

A compiler configured to generate instructions based on a feature set of a processor, wherein, upon executing the instructions, the processor is configured to:

• detect one or more critical memory hazards between memory addresses if memory operations are performed in parallel on multiple addresses corresponding to at least a partial vector, wherein the one or more critical memory hazards include memory hazards that lead to different results when the memory addresses are processed in parallel than when the memory addresses are processed sequentially, and wherein the one or more critical memory hazards are data-dependent and therefore cannot be detected until after the memory addresses have been resolved at runtime;
• and
• generate predicate values which specify the elements for operations that are to be performed in parallel for a first set of consecutive elements in at least the partial vector, wherein the operations include the memory operations, and wherein the first set of consecutive elements is determined based on the one or more critical memory hazards;
• wherein the compiler inserts the instructions in program code prior to runtime.

A computer system configured to execute instructions to avoid one or more memory hazards while performing parallel operations, comprising:

• a processor;
• a memory;
• an instruction fetch unit within the processor configured to fetch:
• instructions for detecting one or more critical memory hazards between memory addresses if memory operations are performed in parallel on multiple addresses corresponding to at least a partial vector, wherein the one or more critical memory hazards include memory hazards that lead to different results when the memory addresses are processed in parallel than when the memory addresses are processed sequentially, and wherein the one or more critical memory hazards are data-dependent and therefore cannot be detected until after the memory addresses have been resolved at runtime;
• and
• instructions for generating predicate values which specify the elements for operations that are to be performed in parallel for a first set of consecutive elements in at least the partial vector, wherein the operations include the memory operations, and wherein the first set of consecutive elements is determined based on the one or more critical memory hazards;
• wherein the instructions for detecting and the instructions for generating predicate values are inserted in program code prior to runtime;
• and
• an execution unit within the processor configured to execute the instructions for detecting the one or more critical memory hazards and configured to execute the instructions for generating the predicate values.