Memory write signaling and methods thereof

A method of controlling a memory device having a plurality of banks, the method comprising:

• conveying a first command and a first bank address to activate a row in a bank identified by the first bank address;
• conveying a second command and a second bank address, the second command specifying a write operation of write data to a bank identified by the second bank address;
• conveying a code that specifies whether data mask information will be issued in connection with the write operation;
• if the code specifies that the data mask information will be conveyed, then conveying the data mask information after conveying the code, the data mask information specifying whether to selectively write portions of the write data;
• and
• conveying the write data associated with the write operation, wherein the write data is conveyed over signal lines separate from those used to convey the first command, first bank address, second command, second bank address, and code.

A method of operation of a memory controller that controls a memory device, the method comprising:

• conveying a first command that specifies activation of a row of memory cells;
• conveying a second command that specifies a write operation to the memory device, wherein write data is to be written to the row in connection with the write operation;
• conveying, via a first signaling resource, a code that specifies whether data mask information will be issued in connection with the write operation, wherein the code is conveyed synchronously with respect to a first transition of a clock signal;
• conveying the write data over a set of signal lines that are separate from signal lines used to convey the first command and the second command;
• and
• if the code specifies that the data mask information will be issued, then conveying two bits of the data mask information over the first signaling resource during a clock cycle of the clock signal, the data mask information to specify whether to selectively write portions of the write data to the memory core.