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US 8,019,928 B2Granted
Method of managing a multi-bit-cell flash memory
AssigneeSanDisk IL Ltd.
InventorMenahem Lasser
Life of this patent
Estimating the term…
Abstract
A flash memory that supports N>1-bit programming is managed by, for at least one block of the memory, selecting the value of N to use for the block, designating one or more cells of the block as flag cells, and programming the flag cells to represent the selected value of N. Preferably, N is encoded according to whether the threshold voltages of the flag cells are greater or less than a reference voltage common to all values of N. The other cells of the block then are programmed in accordance with the selected value of N. N and its flag cells are selected when the block is first used to store data. Subsequent to an erasure of the block, a different value of N may be selected.
Claims38
A method of managing a flash memory that includes at least one block, each block including a plurality of elements, each element having a respective threshold voltage, the method comprising:
- for a first block of the at least one block:
- selecting a first value of a parameter N of an N-bit programming mode associated with the first block;
- designating a single cell of the first block to be a flag cell;
- and
- setting the flag cell to represent the first value of the parameter N and programming at least one element of the first block other than the flag cell according to the N-bit programming mode,
- wherein when the first value of the parameter N is greater than one, the flag cell is programmed according to the N-bit programming mode from an erased state such that only one bit of multiple bits stored at the flag cell is changed from an unprogrammed value to a programmed value to indicate multi-level operation of the first block.
3 more elements
A memory device comprising:
- a flash memory including a first block that includes a plurality of elements;
- and
- a flash memory controller operative to:
- select a value of a parameter N of an N-bit programming mode;
- designate a single cell of the first block to be a flag cell;
- and
- set the flag cell to represent the value of the parameter N and program at least one element of the first block other than the flag cell according to the N-bit programming mode,
- wherein when the value of the parameter N is greater than one, the flag cell is programmed according to the N-bit programming mode from an erased state such that only one bit of multiple bits stored at the flag cell is changed from an unprogrammed value to a programmed value to indicate multi-level operation of the first block.
5 more elements
A system comprising:
- a flash memory including a first block that includes a plurality of elements;
- and
- a non-volatile memory to store program code associated with the first block, wherein the program code, when executed by a processor, causes the processor to:
- select a value of a parameter N of an N-bit programming mode;
- designate a single cell of the first block to be a flag cell;
- and
- set the flag cell to represent the selected value of the parameter N and program an element of the first block other than the flag cell according to the N-bit programming mode,
- wherein when the value of the parameter N is greater than one, the flag cell is programmed according to the N-bit programming mode from an erased state such that only one bit of multiple bits stored at the flag cell is changed from an unprogrammed value to a programmed value to indicate multi-level operation of the first block.
5 more elements
A computer-readable storage medium storing computer-readable code to manage a flash memory that includes a first block, the first block including a plurality of elements, the computer-readable code comprising program code that, when executed by a processor, causes the processor to:
- select a value of a parameter N of an N-bit programming mode;
- designate a single cell of the first block as to be a flag cell;
- and
- set the flag cell to represent the value of the parameter N and program an element of the first block other than the flag cell according to the N-bit programming mode,
- wherein when the value of the parameter N is greater than one, the flag cell is programmed according to the N-bit programming mode from an erased state such that only one bit of multiple bits stored at the flag cell is changed from an unprogrammed value to a programmed value to indicate multi-level operation of the first block.
2 more elements
A method of managing a plurality of non-volatile storage elements, each storage element having a corresponding storage window divisible into a plurality of ranges of storage levels representative of N bits of data, wherein N is an integer greater than zero, the method comprising:
- selecting a first value of N for storing data in one of the non-volatile storage elements;
- designating a single cell of the non-volatile storage elements to be a flag storage cell;
- and
- setting the flag storage cell to represent the first value of N and programming at least one storage element of the non-volatile storage elements other than the flag storage cell according to an N-bit programming mode,
- wherein when the value of N is greater than one, the flag storage cell is programmed according to the N-bit programming mode from an erased state such that only one bit of multiple bits stored at the flag storage cell is changed from an unprogrammed value to a programmed value to indicate multi-level operation of the non-volatile storage element.
2 more elements
A memory device comprising:
- a plurality of non-volatile storage elements, each storage element having a corresponding storage window divisible into a plurality of ranges of storage levels representative of N bits of data, wherein N is an integer greater than zero;
- and
- a controller to:
- select a value of N for storing data in one of the non-volatile storage elements,
- wherein a single cell of the non-volatile storage elements is designated to be a flag storage cell;
- and
- set the flag storage cell to represent the value of N and program a storage element, other than the flag storage cell according to an N-bit programming mode,
- wherein when the value of N is greater than one, the flag storage cell is programmed according to the N-bit programming mode from an erased state such that only one bit of multiple bits stored at the flag storage cell is changed from an unprogrammed value to a programmed value to indicate multi-level operation of the non-volatile storage element.
5 more elements
A system comprising:
- a plurality of non-volatile storage elements, wherein each storage element has a corresponding storage window divisible into a plurality of ranges of storage levels representative of N bits of data, wherein N is an integer greater than zero;
- and
- a non-volatile memory storing program code to:
- select a value of N for storing data in one of the non-volatile storage elements;
- designate a single cell of the non-volatile storage elements to be a flag storage cell;
- and
- set the flag storage cell to represent the value of N and program at least one storage element of the non-volatile storage elements other than the flag storage cell according to an N-bit programming mode,
- wherein when the value of N is greater than one, the flag storage cell is programmed according to the N-bit programming mode from an erased state such that only one bit of multiple bits stored at the flag storage cell is changed from an unprogrammed value to a programmed value to indicate multi-level operation of the non-volatile storage element.
5 more elements
A computer-readable storage medium storing computer-readable code to manage a plurality of non-volatile storage elements, wherein each storage element has a corresponding storage window divisible into a plurality of ranges of storage levels representative of N bits of data, wherein N is an integer greater than zero, the computer-readable code comprising processor executable instructions that, when executed by a processor, cause the processor to:
- select a value of N for storing data in one of the non-volatile storage elements;
- designate a single cell of the non-volatile storage elements to be a flag storage cell;
- and
- set the flag storage cell to represent the selected value of N and program at least one storage element of the non-volatile storage elements other than the flag storage cell according to an N-bit programming mode,
- wherein when the value of N is greater than one, the flag storage element is programmed according to the N-bit programming mode from an erased state such that only one bit of multiple bits stored at the flag storage element is changed from an unprogrammed value to a programmed value to indicate multi-level operation of the non-volatile storage element.
2 more elements
A method of managing a flash memory that includes at least one block, each block including a plurality of elements, each element having a respective threshold voltage, the method comprising:
- for a first block of the at least one block:
- selecting a first value of a parameter N of an N-bit programming mode associated with the first block;
- setting a single flag cell of the first block to represent the first value of the parameter N;
- programming an element of the first block, other than the flag cell, according to the N-bit programming mode;
- and
- reading the flag cell and the element of the first block other than the flag cell,
- wherein when the value of the parameter N is greater than one, the flag cell is programmed according to the N-bit programming mode from an erased state such that only one bit of multiple bits stored at the flag cell is changed from an unprogrammed value to a programmed value to indicate multi-level operation of the first block.
4 more elements
A memory device comprising:
- a flash memory including a first block that includes a plurality of elements;
- and
- a flash memory controller operative to:
- select a value of a parameter N of an N-bit programming mode;
- designate a single cell of the first block to be a flag cell;
- set the flag cell to represent the value of the parameter N;
- program an element of the first block, other than the flag cell, according to the N-bit programming mode;
- and
- read the flag cell and the element of the first block other than the flag cell,
- wherein a single-bit value “0” read from the flag cell corresponds to N=1 and wherein a dual-bit value “01” and a dual-bit value “10” of the flag cell correspond to multi-level operation of the first block.
7 more elements
A system comprising:
- a flash memory including a first block that includes a plurality of elements;
- and
- a non-volatile memory to store program code associated with the first block, wherein the program code, when executed by a processor, causes the processor to:
- select a value of a parameter N of an N-bit programming mode;
- designate a single cell of the first block to be a flag cell;
- set the flag cell to represent the selected value of the parameter N;
- program an element of the first block, other than the flag cell, according to the N-bit programming mode;
- and
- read the flag cell and the element of the first block other than the flag cell,
- wherein a single-bit value “0” read from the flag cell corresponds to N=1 and wherein a dual-bit value “01” and a dual-bit value “10” of the flag cell correspond to multi-level operation of the first block.
7 more elements
A computer-readable storage medium storing computer-readable code to manage a flash memory that includes a first block, the first block including a plurality of elements, the computer-readable code comprising program code that, when executed by a processor, causes the processor to:
- select a value of a parameter N of an N-bit programming mode;
- designate a single cell of the first block to be a flag cell;
- set the flag cell to represent the value of the parameter N;
- program an element of the first block, other than the flag cell, according to the N-bit programming mode;
- and
- read the flag cell and the element of the first block other than the flag cell,
- wherein when the value of the parameter N is greater than one, the flag cell is programmed according to the N-bit programming mode from an erased state such that only one bit of multiple bits stored at the flag cell is changed from an unprogrammed value to a programmed value to indicate multi-level operation of the first block.
4 more elements
A method of managing a plurality of non-volatile storage elements, each storage element having a corresponding storage window divisible into a plurality of ranges of storage levels representative of N≧1 bits of data, the method comprising:
- selecting a first value of N to store data in one of the non-volatile storage elements;
- designating a single cell of the non-volatile storage elements to be a flag storage cell;
- setting the flag storage cell to represent the first value of N;
- programming a storage element of the non-volatile storage elements other than the flag storage cell according to an N-bit programming mode;
- and
- reading the flag storage cell and the storage element other than the flag storage cell,
- wherein when the value of N is greater than one, the flag storage cell is programmed according to the N-bit programming mode from an erased state such that only one bit of multiple bits stored at the flag storage cell is changed from an unprogrammed value to a programmed value to indicate multi-level operation of the non-volatile storage element.
4 more elements
A memory device comprising:
- a plurality of non-volatile storage elements, each storage element having a corresponding storage window divisible into a plurality of ranges of storage levels representative of N≧1 bits of data;
- and
- a controller to:
- select a first value of N to store data in one of the non-volatile storage elements;
- designate a single cell of the non-volatile storage elements to be a flag storage cell;
- set the flag storage cell to represent the first value of N;
- program a storage element of the non-volatile storage elements, other than the flag storage cell, according to an N-bit programming mode;
- and
- read the flag storage cell and the storage element other than the flag storage cell,
- wherein when the value of N is greater than one, the flag storage cell is programmed according to the N-bit programming mode from an erased state such that only one bit of multiple bits stored at the flag storage cell is changed from an unprogrammed value to a programmed value to indicate multi-level operation of the non-volatile storage element.
7 more elements
A system comprising:
- a plurality of non-volatile storage elements, each storage element having a corresponding storage window divisible into a plurality of ranges of storage levels representative of N≧1 bits of data;
- and
- a non-volatile memory to store program code, wherein the program code, when executed by a processor, causes the processor to:
- select a value of N to store data in one of the non-volatile storage elements, wherein a single cell of the non-volatile storage elements is designated to be a flag storage cell;
- set the flag storage cell to represent the value of N;
- program a storage element of the non-volatile storage elements, other than the flag storage cell according to an N-bit programming mode;
- and
- read the flag storage cell and the storage element of the non-volatile storage elements other than the flag storage cell,
- wherein when the value of N is greater than one, the flag storage cell is programmed according to the N-bit programming mode from an erased state such that only one bit of multiple bits stored at the flag storage cell is changed from an unprogrammed value to a programmed value to indicate multi-level operation of the non-volatile storage element.
6 more elements
A computer-readable storage medium storing computer-readable code to manage a plurality of non-volatile storage elements, wherein each storage element has a corresponding storage window divisible into a plurality of ranges of storage levels representative of N≧1 bits of data, the computer-readable code comprising processor executable instructions that, when executed by a processor, cause the processor to:
- select a value of N to store data in one of the non-volatile storage elements;
- designate a single cell of the non-volatile storage elements to be a flag storage cell;
- set the flag storage cell to represent the value of N;
- program a storage element of the non-volatile storage elements other than the flag storage cell according to an N-bit programming mode;
- and
- read the flag storage cell and the storage element of the non-volatile storage elements other than the flag storage cell,
- wherein when the value of N is greater than one, the flag storage cell is programmed according to the N-bit programming mode from an erased state such that only one bit of multiple bits stored at the flag storage cell is changed from an unprogrammed value to a programmed value to indicate multi-level operation of the non-volatile storage element.
4 more elements
Dependencies are inferred from the claim text.