Network core access architecture

A network core access system for accessing individual functional cores of a system-on-chip, comprising:

• a network interface core, having a Child Select Register, and switchable between:
• a medium access control (MAC) IP connection to an embedded processor that is configured to implement other layers of the IP protocol stack, and
• an IP core access connection;
• one or more functional cores, having a Child Select Register, and accessible whether directly, by the said IP core access connection to the network interface core, whether through other functional cores, by further IP core access connections;
• and
• a network comprising said MAC IP connection and said IP core access connections;
• wherein the network interface core further comprises a direct connection to the core or external chip responsible for implementing the physical layer of the protocol;
• and wherein all said connections are parallel and all said connections are established in a tree, recursively and hierarchically, by:
• switching said network interface core (parent core), to one or more functional cores (child cores);
• and
• switching each functional core of an arbitrary level (parent core) to one of the connected functional cores of the next level (child cores), wherein each functional core has only one parent connection;
• through:
• handshaking request and acknowledge signals in each direction;
• selecting and writing in the Child Select Register, of the parent core, a value corresponding to the child core to switch to, therefore placing the parent core in transparent operation;
• and
• selecting and writing in the Child Select Register, of the child core, a special value corresponding to back selecting the parent core, therefore ending the parent core transparent operation.

A method for operating a network core access system for accessing individual functional cores of a system-on-chip, comprising:

• switching a connection from a network interface core between:
• a medium access control (MAC) IP connection to an embedded processor implementing other layers of the IP protocol stack, and
• an IP core access connection to functional cores;
• switching a connection between one or more functional cores to the network interface core, whether directly through said IP core access connection, whether through other functional cores by further IP core access connections;
• and
• establishing a direct connection from the network interface core to the core or external chip responsible for implementing the physical layer of the protocol;
• wherein all said connections are established through parallel connections, and all said connections are established in a tree, recursively and hierarchically, by:
• switching said network interface core (parent core), to one or more functional cores (child cores);
• and
• switching each functional core of an arbitrary level (parent core) to one or more of the connected functional cores of the next level (child cores), wherein each functional core has only one parent connection;
• through:
• handshaking request and acknowledge signals in each direction;
• selecting and writing in a Child Select Register, of a parent core, a value corresponding to the child core to switch to, therefore placing the parent core in transparent operation;
• and
• selecting and writing in a Child Select Register, of a child core, a special value corresponding to back selecting the parent core, therefore ending the parent core transparent operation.