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US 8,019,589 B2Granted
Memory apparatus operable to perform a power-saving operation
AssigneeGoogle Inc.
InventorsSuresh Natarajan Rajan, Keith R. Schakel, Michael John Sebastian Smith, David T. Wang, Frederick Daniel Weber
Life of this patent
Estimating the term…
Abstract
A memory subsystem is provided including an interface circuit adapted for communication with a system and a majority of address or control signals of a first number of memory circuits. The interface circuit includes emulation logic for emulating at least one memory circuit of a second number.
Claims17
A memory apparatus for use with a host system, the memory apparatus comprising:
- a plurality of memory circuits on a registered dual in-line memory module (R-DIMM);
- and
- one or more components electrically couplable to the host system, the one or more components being operable to present to the host system a simulated memory circuit where there is a difference in at least one aspect between the simulated memory circuit and one or more memory circuits of the plurality of memory circuits,
- wherein each memory circuit of the plurality of memory circuits is electrically coupled to at least one of the one or more components, where the one or more components are further operable to identify at least one memory circuit of the plurality of memory circuits that is not being accessed;
- and
- a chip on the R-DIMM operable to perform a power-saving operation on the at least one memory circuit identified as not being accessed.
3 more elements
A memory apparatus for use with a host system, the memory apparatus comprising:
- an interface circuit;
- and
- a plurality of memory circuits, each memory circuit of the plurality of memory circuits being electrically coupled to the interface circuit,
- where the interface circuit is operable to present to the host system a simulated memory circuit, where there is a difference in at least one aspect between the simulated memory circuit and at least one of the plurality of memory circuits, and
- where the interface circuit is further operable to identify at least one memory circuit of the plurality of memory circuits as not being accessed and to perform a power-saving operation on the at least one memory circuit identified as not being accessed.
2 more elements
Dependencies are inferred from the claim text.