System and method for efficiently testing cache congruence classes during processor design verification and validation

An information handling system comprising:

• one or more processors;
• a memory accessible by one or more of the processors;
• one or more nonvolatile storage devices accessible by the processors;
• and
• a set of instructions stored in the memory, wherein one or more of the processors executes the set of instructions in order to perform actions of:
• building a test case to test a first congruence class from a plurality of congruence classes that partitions a cache, the first congruence class corresponding to a congruence class identifier first value;
• executing the test case, which results in testing the first congruence class;
• after the executing, changing the congruence class identifier to a second value;
• and
• re-executing the test case using the congruence class identifier second value, which results in testing a second congruence class from the plurality of congruence classes, wherein the second congruence class is different than the first congruence class.

A computer program product stored on a non-transitory computer operable storage medium containing instructions for execution by a computer, which, when executed by the computer, cause the computer to implement a method of processing test cases, the method comprising:

• building a test case to test a first congruence class from a plurality of congruence classes that partitions a cache, the first congruence class corresponding to a congruence class identifier first value;
• executing the test case, which results in testing the first congruence class;
• after the executing, changing the congruence class identifier to a second value;
• and
• re-executing the test case using the congruence class identifier second value, which results in testing a second congruence class from the plurality of congruence classes, wherein the second congruence class is different than the first congruence class.