US 8,015,537 B1Granted

Automated rate realization for circuit designs within high level circuit implementation tools

AssigneeXilinx, Inc.

InventorsArvind Sundararajan, Nabeel Shirazi

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Abstract

A computer-implemented method of automatic rate realization for implementing a circuit design within a programmable integrated circuit can include comparing data rates of clock domains of the circuit design with frequencies of available clock sources of the circuit design and determining which clock domains have data rates that match frequencies of clock sources. For each clock domain that has a data rate matching a frequency of a clock source, loads of the clock domain can be clocked using a multiple synchronous clock technique with the matching clock source. For each clock domain having a data rate that does not match a frequency of a clock source, loads of the clock domain can be clocked using a clock enable technique. The circuit design specifying the clock circuitry for each clock domain can be output.

Claims16

Dependent claims

A computer-implemented method of automatic rate realization for implementing a circuit design within a programmable integrated circuit, the method comprising:

comparing data rates of clock domains of the circuit design with frequencies of available clock sources of the circuit design;
determining which clock domains have data rates that match frequencies of clock sources;
for each clock domain that has a data rate matching a frequency of a clock source, clocking loads of the clock domain using a multiple synchronous clock technique with the matching clock source;
for each clock domain having a data rate that does not match a frequency of a clock source, clocking loads of the clock domain using a clock enable technique;
and
outputting the circuit design specifying clock circuitry for each clock domain;
wherein clocking loads of the clock domain using a multiple synchronous clock technique comprises, for each clock domain having a data rate that matches a clock source:
clocking loads of the clock domain with the clock source;
and
coupling a clock enable port of the loads of the clock domain to a voltage source of the circuit design;
wherein the comparing, the determining, the clocking loads of the clock domain using a multiple synchronous clock technique, the clocking loads of the clock domain using a clock enable technique, and the outputting are performed by the computer.

8 more elements

A computer-implemented method of automatic rate realization for implementing a circuit design within a programmable integrated circuit, the method comprising:

comparing data rates of clock domains of the circuit design with frequencies of available clock sources of the circuit design;
for each clock domain, selecting a rate realization technique according to the comparison;
coupling loads of each clock domain to clock sources according to the selected rate realization technique for each respective clock domain;
and
outputting the circuit design specifying clocking circuitry for each clock domain;
wherein selecting a rate realization technique according to the comparison comprises, for each clock domain:
when the data rate of the clock domain matches a frequency of a clock source, coupling loads of the clock domain to the clock source using a multiple synchronous clock technique;
and
when the data rate of the clock domain does not match a frequency of a clock source, coupling loads of the clock domain to a clock source having a frequency that is an integer multiple of the data rate of the clock domain;
wherein coupling loads of the clock domain to the clock source using a multiple synchronous clock technique comprises:
clocking loads of the clock domain with the clock source;
and
coupling a clock enable port of the loads of the clock domain to a voltage source;
wherein the comparing, the selecting, the coupling, and the outputting are performed by the computer.

11 more elements

A computer program product, comprising:

a non-transitory computer-usable medium comprising computer-usable program code that performs automatic rate realization for implementing a circuit design within a programmable integrated circuit, the computer-usable medium comprising:
computer-usable program code that compares data rates of clock domains of the circuit design with frequencies of available clock sources of the circuit design;
computer-usable program code that determines which clock domains have data rates that match frequencies of clock sources;
computer-usable program code that, for each clock domain that has a data rate matching a frequency of a clock source, clocks loads of the clock domain using a multiple synchronous clock technique with the matching clock source;
computer-usable program code that, for each clock domain having a data rate that does not match a frequency of a clock source, clocks loads of the clock domain using a clock enable technique;
and
computer-usable program code that outputs the circuit design specifying clock circuitry for each clock domain;
and
wherein the computer-usable program code that clocks loads of the clock domain using a multiple synchronous clock technique comprises computer-usable program code that, for each clock domain having a data rate that matches a clock source:
clocks loads of the clock domain with the clock source;
and
couples a clock enable port of the loads of the clock domain to a voltage source of the circuit design.

9 more elements

Dependencies are inferred from the claim text.