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US 8,015,473 B2Granted
Method, system, and apparatus for ECC protection of small data structures
AssigneeIntel Corporation
InventorsSean S. Eilert, Peter Leung, Rich Fackenthal
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Abstract
Data structures of different sizes may be stored in memory using different ECC schemes. A memory device may include multiple ECC engines to support error correction operations on different sized data structures.
Claims18
An apparatus comprising:
- a memory array;
- a first error correcting code (ECC) engine coupled to the memory array to perform ECC encoding and ECC decoding for data structures of a first size;
- and
- a second ECC engine coupled to the memory array to perform ECC encoding and ECC decoding for data structures of a second size, wherein the data structures of the second size are larger than the data structures of the first size and wherein only one of said first and second ECC engines is operable at any time, the first error correcting code engine being operable when data structures of a first size are being written and said second ECC engine being operable when data structures of said second size are being written to the memory array.
1 more element
A method comprising:
- determining a size of a value to be written to a memory array;
- using a first error correcting code (ECC) scheme if the value is of a first size;
- and
- using a second ECC scheme if the value is of a second size, said first and second sizes being different.
1 more element
A system comprising:
- an interconnect;
- a controller coupled to the interconnect;
- and
- a memory device coupled to the interconnect, wherein the memory device includes a memory array, a first error correcting code (ECC) engine coupled to the memory array to perform ECC encoding and ECC decoding for data structures of a first size, and a second ECC engine coupled to the memory array to perform ECC encoding and ECC decoding for data structures of a second size, wherein the data structures of the second size are larger than the data structures of the first size and wherein only one of said first and second ECC engines is operable at any time, the first error correcting code engine being operable when data structures of a first size are being written and said second ECC engine being operable when data structures of said second size are being written to the memory array.
1 more element
Dependencies are inferred from the claim text.