Launching multiple concurrent memory moves via a fully asynchronoous memory mover

In a data processing system having a processor, a memory subsystem having a memory coupled to the processor, an asynchronous memory mover and an address translation mechanism associated with the asynchronous memory mover, a method comprising:

• detecting a receipt of a first set of parameters in a first set of registers among multiple sets of registers for storing addressing and control parameters utilized to generate one or more asynchronous memory move (AMM) operations, wherein the first set of parameters are forward to the asynchronous memory mover from the processor after the processor initiates a data move in virtual address space, utilizing a source effective address and a destination effective address;
• in response to receiving the first set of parameters, generating and launching a first asynchronous memory move (AMM) operation by which first data are moved from a first memory location having a source real address corresponding to the source effective address to a second memory location having a destination real address corresponding to the destination effective address;
• the address translation mechanism:
• translating the source effective address and the destination effective address of the data move operation into the corresponding source real address and destination real address following completion of the data move operation in effective address space;
• and providing the source real address and destination real address to the asynchronous memory mover to complete the data move within the memory;
• monitoring for a completion of the first AMM operation at the memory;
• and
• responding to a detection of a second set of parameters in a second set of registers by generating and launching a second AMM operation concurrently with the first AMM operation, wherein parallel movement of data within the memory is supported;
• wherein both the first AMM operation and the second AMM operation occur concurrently within the memory subsystem, independent of the processor.

A computer program product comprising:

• a computer storage medium;
• and
• program code on the computer storage medium that when executed on a data processing system having a processor, a memory subsystem having a memory coupled to the processor, and an asynchronous memory mover, the program code enables completion of asynchronous memory move operations comprising:
• detecting a receipt of a first set of parameters in a first set of registers among multiple sets of registers for storing addressing and control parameters utilized to generate one or more asynchronous memory move (AMM) operations, wherein the first set of parameters are forward to the asynchronous memory mover from the processor after the processor initiates a data move in virtual address space, utilizing a source effective address and a destination effective address;
• in response to receiving the first set of parameters, generating and launching a first asynchronous memory move (AMM) operation by which first data are moved from a first memory location having a source real address corresponding to the source effective address to a second memory location having a destination real address corresponding to the destination effective address;
• monitoring for a completion of the first AMM operation at the memory;
• responding to a detection of a second set of parameters in a second set of registers by generating and launching a second AMM operation concurrently with the first AMM operation, wherein parallel movement of data within the memory is supported;
• wherein both the first AMM operation and the second AMM operation occur concurrently within the memory subsystem, independent of the processor;
• completing the AMM operation concurrently with a completion by the processor of other work of the executing thread, wherein the processor continues to execute subsequently received instructions while the AMM operation is ongoing;
• in response to detection of a barrier operation issued by the processor, which halts execution of all subsequently received non-AMM operations within the threads of execution:
• completing the AMM operation past the barrier operation;
• and
• preventing access to the data at the destination effective address and the destination real address until receipt of a notification of completion for the barrier operation;
• and
• in response to detecting a presence of an AMM SYNC operation, responding to the AMM SYNC operation by suspending launching of subsequent AMM operations until a completion notification is received for the AMM SYNC, wherein all subsequent operations including the AMM operation are prevented from executing on the fabric until the AMM SYNC operation completes.