Wake-and-go mechanism with exclusive system bus response

A data processing system, comprising:

• a wake-and-go mechanism;
• and
• a wake-and-go storage array,
• wherein the wake-and-go mechanism is configured to:
• responsive to detecting instructions indicating that a thread is waiting for data at a target address, issue a look-ahead load command on a system bus to read a data value from a target address;
• perform a comparison operation to determine whether the data value at the target address indicates that the data for which the thread is waiting is at the target address;
• in response to the comparison resulting in a determination that the data for which the thread is waiting is not at the target address, populate the wake-and-go storage array with the target address;
• in response to the comparison resulting in a determination that the data for which the thread is waiting is at the target address, issue a load command on the system bus to read the data value from the target address with data exclusivity;
• and
• responsive to the wake-and-go mechanism obtaining the lock for the target address, hold the lock for the thread.

A computer program product comprising a computer useable storage medium having a computer readable program stored thereon, wherein the computer readable program, when executed on a computing device, causes the computing device to:

• issue, by the wake-and-go mechanism, a look-ahead load command on a system bus to read a data value from a target address;
• perform a comparison operation to determine whether the data value at the target address indicates that the data for which the thread is waiting is at the target address;
• in response to the comparison resulting in a determination that the data for which the thread is waiting is not at the target address, populate a wake-and-go storage array with the target address;
• in response to the comparison resulting in a determination that the data for which the thread is waiting is at the target address, issue, by the wake-and-go mechanism, a load command on the system bus to read the data value from the target address with data exclusivity;
• and
• responsive to the wake-and-go mechanism obtaining the lock for the target address, hold, by the wake-and-go mechanism, the lock for the thread.