Optimized flash memory access method and device

A method for accessing data stored in an electronic memory device comprising:

• for a page of memory, storing in at least one memory cell in the page, error correction code data indicating whether error correction code information for the page is to be stored;
• for said page of memory, storing in at least one memory cell in the page, erase guard data indicating a programmed or erased state of the page;
• and
• prior to accessing data stored in each page of memory, reading the page error correction and page erase guard data for that page.

A memory device, comprising:

• a memory-cell array including,
• at least one group of memory cells divided into programmable memory regions with two different data storage densities,
• each programmable memory region including memory cells arranged in rows and columns with memory cells in respective rows being designated pages,
• each page including a subgroup of memory cells operable to store error correction code data associated with data stored in the other memory cells in that page,
• wherein each page includes at least one memory cell operable to store error correction code guard data indicating whether error correction coding is applied to data stored in the memory cells of that page, and
• wherein the subgroup of memory cells in each page stores erase guard data indicating a programmed or erased state of the data stored in the memory cells of that page.

An electronic system, comprising:

• electronic circuitry;
• a memory device coupled to the electronic circuitry, the memory device including,
• a memory-cell array including,
• at least one group of memory cells divided into programmable memory regions with two different data storage densities,
• each programmable memory region including memory cells arranged in rows and columns with memory cells in respective rows being designated pages,
• each page including a subgroup of memory cells operable to store error correction code data associated with data stored in the other memory cells in that page,
• wherein each page includes at least one memory cell operable to store error correction code guard data indicating whether error correction coding is applied to data stored in the memory cells of that page, and
• wherein the subgroup of memory cells in each page stores erase guard data indicating a programmed or erased state of the data stored in the memory cells of that page.