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US 8,015,344 B2Granted
Apparatus and method for processing data of flash memory
AssigneeSamsung Electronics Co., Ltd.
InventorsJin-kyu Kim, Min-young Kim, Song-ho Yoon
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Abstract
Provided are an apparatus and method for processing data of flash memory. The apparatus includes a user requesting unit to request a data operation using a predetermined logical address, a transformation unit to transform the logical address into a physical address, and a control unit to record count data counting the number of predetermined bits of data, in an index region to indicate whether the data is valid when conducting the data operation.
Claims20
A data processing apparatus of a flash memory, comprising:
- a user requesting unit which requests a data operation using a predetermined logical address;
- a transformation unit which transforms the logical address into a physical address;
- and
- a control unit which records count data and second data that is transformed from the count data, said count data equal to a number of bits of data at the logical address having a predetermined value, in an index region in the flash memory, and when conducting the data operation, determines whether an inverse transformation of the second data is equal to the count data, and in response to determining the inverse transformation of the second data is equal to the count data, determines whether the count data is equal to the number of bits of data at the logical address having the predetermined value and determines that the data at the logical address is valid if the count data is equal to the number of bits at the logical address having the predetermined value.
1 more element
A data processing apparatus of a flash memory, comprising:
- an extracting unit which extracts count data and second data recorded in an index region in the flash memory, said count data equal to a number of bits of data having a predetermined value stored at a logical address and said second data being data that is transformed from the count data;
- and
- a control unit which determines whether an inverse transformation of the second data is equal to the count data, and in response to determining the inverse transformation of the second data is equal to the count data, determines whether the count data is equal to the number of bits of data at the logical address and determines that the data at the logical address is valid if the count data is equal to the number of bits at the logical address having the predetermined value.
A method of validating data stored in a flash memory, comprising:
- requesting a predetermined data operation that uses a predetermined logical address;
- transforming the logical address into a physical address;
- recording count data and second data that is transformed from the count data, said count data equal to a number of bits of data at the logical address having a predetermined value, in an index region in the flash memory;
- determining, when conducting the data operation, whether an inverse transformation of the second data is equal to the count data, and in response to determining the inverse transformation of the second data is equal to the count data, determining whether the count data is equal to the number of bits of data at the logical address having the predetermined value;
- and
- determining that the data at the logical address is valid if the count data is equal to the number of bits at the logical address having the predetermined value.
3 more elements
A method of validating data stored in a flash memory, comprising:
- extracting count data and second data that is transformed from the count data recorded in an index region in the flash memory, said count data equal to a number of bits of data having a predetermined value stored at a logical address;
- determining whether an inverse transformation of the second data is equal to the count data, and in response to determining the inverse transformation of the second data is equal to the count data, determining whether the count data is equal to the number of bits of data at the logical address;
- and
- determining that the data at the logical address is valid if the count data is equal to the number of bits at the logical address having the predetermined value.
1 more element
Dependencies are inferred from the claim text.