High-frequency counter
AssigneeNXP B.V.
InventorRemco C. H. Van De Beek
Life of this patent
Estimating the term…
Abstract
A counter circuit and method of controlling such a counter circuit, including a first counting section that counts in accordance with a state-cycle, and a second counting section clocked by the first counting section. At least one invalid counting state is introduced by controlling the second counting section to change its state before the first counting section has completed the state-cycle; and the invalid counting state is then detected and corrected. Thereby, some redundancy is introduced in the counter, which can be used to detect and correct incomplete switching of counter states.
Claims11
A counter circuit comprising:
- a first counting section for counting in accordance with a state-cycle;
- a second counting section clocked by said first counting section;
- a logic circuit for introducing at least one invalid counting state by controlling said second counting section to change its state before said first counting section has completed said state-cycle;
- and
- a decoder for detecting and correcting said at least one invalid counting state.
A method of controlling a counter circuit, said method comprising:
- counting in a first counting section in accordance with a state-cycle;
- clocking a second counting section by using said first counting section;
- introducing at least one invalid counting state by controlling said second counting section to change its state before said first counting section has completed said state-cycle;
- and
- detecting and correcting said at least one invalid counting state.
Dependencies are inferred from the claim text.