Parallel packet processor with session active checker

A process for processing received packets, comprising:

• holding at least one received packet in an input buffer
• storing, in a plurality of first-in first-out (FIFO) queues, packets for processing by a corresponding plurality of packet processors, each of the plurality of FIFO queues having predetermined number of slots to store packets
• storing, in a session active memory, a plurality of session identifiers corresponding to the slots in the plurality of FIFO queues
• prior to sending the received packet from the input buffer to one of the plurality of FIFO queues
• extracting a session identifier from the received packet to identifying a session associated with the received packet
• comparing the session identifier extracted from the received packet with the plurality of session identifiers stored in the session action memory to determine if any other packet belonging to the identified session is currently stored in the FIFO queues
• when no other packets belonging to the identified session are currently stored in the FIFO queues, sending the received packet to a selected one of the plurality of FIFO queues
• when another packet belonging to the identified session is currently being processed by one of the plurality of packet processors, waiting until the processing of the other packet is complete before sending the received packet to the selected FIFO queue.

A non-transitory computer readable storage medium having programming code stored thereon which, when used to program a field programmable gate array, will cause the field programmable gate array to be configured as an apparatus for processing received packets, the apparatus comprising:

• a plurality of packet processors
• a session active checker to distribute received packets among the plurality of packet processors
• a plurality of first-in first-out (FIFO) queues to store packets sent from the session active checker to a corresponding one of the plurality of packet processors, each queue having a predetermined number of slots to store packets
• wherein the session active checker comprises:
• a session active memory adapted to store a plurality of session identifiers corresponding to the slots in the plurality of FIFO queues
• logic that extracts a session identifier from a received packet to identify a session associated with the received packet
• a comparator that compares the session identifier extracted from the received packet with the session identifiers stored in the session active memory to determine if any other packet belonging to the identified session is currently stored in any of the plurality of FIFO queues
• logic that sends the received packet to a selected packet processor of the plurality of packet processors in the case that no other packets belonging to the identified session are currently stored in the plurality of FIFO queues, wherein
• in the case that the session active checker determines that another packet belonging to the identified session is currently stored in the plurality of FIFO queues, the session active checker waits until the processing of the other packet is complete before sending the received packet to the selected packet processor.

An apparatus for processing received packets, comprising:

• a plurality of packet processors
• a session active checker comprising logic that
• identifies a session associated with a received packet
• determines if any other packet belonging to the identified session is currently being processed by any of the plurality of packet processors
• sends the received packet to a selected packet processor of the plurality of packet processors in the case that no other packets belonging to the identified session are currently being processed, wherein
• in the case that the session active checker determines that another packet belonging to the identified session is currently being processed by a specific packet processor, the session active checker sends the received packet to the specific packet processor, waiting when necessary for a slot to become available in a first-in first-out queue corresponding to the specific packet processor.

A process for processing received packets, comprising:

• holding at least one received packet in an input buffer
• prior to sending the received packet from the input buffer to one of a plurality of packet processors
• identifying a session associated with the received packet
• determining if any other packet belonging to the -session is currently being processed by any of the plurality of packet processors
• when no other packets belonging to the identified session are currently being processed, sending the received packet to a selected one of a plurality of packet processors
• when another packet belonging to the identified session is currently being processed by a specific packet processor, waiting until an empty slot is available in a first-in first-out queue corresponding to the specific packet processor, and then sending the received packet to the specific packet processor.

A non-transitory computer readable storage medium having programming code stored thereon which, when used to program a field programmable gate array, will cause the field programmable gate array to be configured as an apparatus for processing received packets, the apparatus comprising:

• a plurality of packet processors
• a session active checker comprising logic that
• identifies a session associated with a received packet
• determines if any other packet belonging to the identified session is currently being processed by any of the plurality of packet processors
• sends the received packet to a selected one of the plurality of packet processors in the case that no other packets belonging to the identified session are currently being processed, wherein
• in the case that the session active checker determines that another packet belonging to the identified session is currently being processed by a specific packet processor, the session active checker waits until an empty slot is available in a first-in first-out queue corresponding to the specific packet processor, and then sends the received packet to the specific packet processor.