Laser driving circuit, its recording compensation method and optical-disk apparatus

A recording compensation method provided for a laser driving circuit configured to generate a light emission timing of a laser on the basis of recorded data and a recording clock signal which are supplied to said laser driving circuit, said recording compensation method comprising the steps of:

• generating a plurality of clock signals having phases different from each other to serve as clock signals synchronized with said recording clock signal supplied to said laser driving circuit;
• latching said clock signals, which are generated at said phase synchronization step as clock signals having phases different from each other, with a timing according to said recorded data supplied to said laser driving circuit and determining a phase optimum for an operation to latch said recorded data on the basis of a combination of said values of said latched clock signals;
• and
• latching said recorded data supplied to said laser driving circuit by making use of a clock signal having a phase conforming to a result of determination carried out at said skew determination step,
• wherein said data latching step is executed in order to select a clock signal with a phase having a timing margin with respect to the phase of said recorded data supplied to said laser driving circuit to serve as said clock signal which is used for latching said recorded data, and
• wherein said latching said clock signals step verifies that the same value has been consecutively obtained a plurality of times in a row as a result of an operation to latch each of said clock signals with a timing according to said recorded data.

An optical-disk apparatus configured to record recorded data onto an optical disk medium by making use of laser employing a recording compensation circuit configured to generate a light emission timing of said laser on the basis of recorded data and a recording clock signal which are supplied to said recording compensation circuit comprising:

• a phase synchronization circuit configured to generate a plurality of clock signals having phases different from each other to serve as clock signals synchronized with said recording clock signal supplied to said phase synchronization circuit;
• a skew determination circuit configured to latch some of said clock signals, which are generated by said phase synchronization circuit as clock signals having phases different from each other, with a timing according to said recorded data supplied to said skew determination circuit and configured to determine a phase optimum for an operation to latch said recorded data on the basis of a combination of the values of said latched clock signals;
• and
• a data latching circuit configured to latch said recorded data supplied to said date latching circuit by making use of a clock signal having a phase conforming to a result of determination carried out by said skew determination circuit,
• wherein said data latching circuit selects a clock signal with a phase having a timing margin with respect to the phase of said recorded data supplied to said data latching circuit to serve as said clock signal which is used for latching said recorded data, and
• wherein said skew determination circuit has a consecutive-times consistency determination circuit configured to carry out a process of verifying that the same value has been consecutively obtained a plurality of times in a row as a result of an operation to latch each of said clock signals, which are generated by said phase synchronization circuit as clock signals having phases different from each other, with a timing according to said recorded data supplied to said skew determination circuit.