Non-volatile memory control circuit
AssigneeSemiconductor Components Industries, LLC
InventorYoshinobu Kaneda
Life of this patent
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Abstract
An efficient erasure is performed. The voltage of a source line SL is manipulated in units of a sector providing a plurality of memory cells. An erase command is received for the desired memory cells to be erased in a plurality of word line WL units arranged within a sector and all data within the sector, which includes the desired memory cells to be erased, is saved in a separate memory. Erasure is then performed for the entire sector, and among the saved data the data outside the desired memory cells to be erased is returned to the memory cells.
Claims3
A non-volatile memory control circuit for controlling the erasure of non-volatile memory, said non-volatile memory is divided into sectors, each sector includes a plurality of memory cells;
- memory cells within one sector are controlled by one source line with a source voltage in common;
- and memory cells within one sector are divided and connected to a plurality of word lines;
- said non-volatile memory control circuit receives an erase command for a desired area to be erased with memory cells connected to part of a plurality of word lines disposed within the sector as a unit;
- data of all memory cells within the sector including the desired area to be erased is saved to a separate memory;
- erase is performed for the entire sector;
- among the saved data, data outside the desired memory cells to be erased is returned to the corresponding memory cells.
Dependencies are inferred from the claim text.