Non-volatile semiconductor memory device
AssigneePanasonic Corporation
InventorsMasayoshi Nakayama, Kazuyuki Kouno, Reiji Mochida, Hoshihide Haruyama
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AssigneePanasonic Corporation
InventorsMasayoshi Nakayama, Kazuyuki Kouno, Reiji Mochida, Hoshihide Haruyama
Estimating the term…
In a non-volatile semiconductor memory device, variations in voltage applied to a bit line when an erase voltage applying step is repeatedly executed are suppressed, thereby reducing variations in Vt after erasure. A memory array includes memory cells arranged in an array, a plurality of word lines, and a plurality of bit lines and main bit lines. The memory array also includes a usable region which can store data and an isolation region which cannot store data. Each bit line provided in the usable region is connected via a select transistor to the corresponding main bit line. At least one main bit line is connected not only to a bit line of the usable region, but also to a bit line of the isolation region via a select transistor.
A non-volatile semiconductor memory device comprising:
Dependencies are inferred from the claim text.