Chip capacitor
AssigneeATI Technologies ULC
InventorsOleg Drapkin, Grigori Temkine, Kristina Au
Life of this patent
Estimating the term…
Abstract
Various capacitors for use with integrated circuits and other devices and fabrication methods are disclosed. In one aspect, a method of manufacturing is provided that includes forming a first capacitor plate that has at least two non-linear strips and forming a second capacitor plate that has a non-linear strip positioned between the at least two non-linear strips of the first capacitor plate. A dielectric is provided between the non-linear strip of the second capacitor plate and the at least two non-linear strips of the first capacitor plate.
Claims25
A method of manufacturing, comprising:
- forming a first capacitor plate having at least two non-linear shaped strips;
- forming a second capacitor plate having a non-linear shaped strip positioned between the at least two non-linear shaped strips of the first capacitor plate;
- and
- providing a dielectric between the non-linear shaped strip of the second capacitor plate and the at least two non-linear shaped strips of the first capacitor plate.
The method of 1, wherein the method is performed by synthesizing hardware description language instructions.
A method of manufacturing, comprising:
- forming a first capacitor plate having a first plurality of successively vertically stacked conductor structures;
- forming a second capacitor plate having a second plurality of successively vertically stacked conductor structures positioned adjacent to the first plurality of conductor structures;
- and
- forming a dielectric positioned between the first and second pluralities of successively vertically stacked conductor structures.
A method of manufacturing, comprising:
- providing a semiconductor chip;
- forming a first capacitor plate in the semiconductor chip, the first capacitor plate having a first bore therethrough;
- forming a capacitor dielectric in the first bore of the first capacitor plate, the capacitor dielectric having a second bore;
- and
- forming a second capacitor plate in the second bore of the capacitor dielectric.
An apparatus, comprising:
- a first capacitor plate having at least two non-linear shaped strips;
- a second capacitor plate having a non-linear shaped strip positioned between the at least two non-linear shaped strips of the first capacitor plate;
- and
- a dielectric positioned between the non-linear shaped strip of the second capacitor plate and the at least two non-linear shaped strips of the first capacitor plate.
An apparatus, comprising:
- a first capacitor plate having first plurality of successively vertically stacked conductor structures;
- a second capacitor plate having a second plurality of successively vertically stacked conductor structures positioned adjacent to the first plurality of successively vertically conductor structures;
- and
- a dielectric positioned between the first and second pluralities of successively vertically stacked conductor structures.
Dependencies are inferred from the claim text.