Protection for proximity electronics against electrostatic discharge
AssigneeOracle America, Inc.
InventorsRobert J. Drost, Scott M. Fairbanks, Alex Chow
Life of this patent
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Abstract
A system of protecting a proximity communication system against electrostatic discharge (ESD). The proximity communication system includes two chips, each having an array of electrical pads at its surface and covered by a thin dielectric layer such that capacitive coupling circuits are formed between the chips when they are joined together. In at least one of the chips, an additional protection pad is formed away from the array, and heavy protection circuitry is connected to it. Its surface is exposed through the dielectric surface over it such that, when an ESD aggressor approaches, the discharge occurs to the protection pad.
Claims15
A first chip configured to be aligned with a corresponding second chip for proximity communication between the chips, comprising:
- a substrate;
- a plurality of conductive first pads formed in the surface of the substrate and connected to respective communication circuitry;
- a conductive second pad formed in the surface of the substrate away from the first pads;
- a dielectric layer formed over the first pads for forming a capacitive gap between pads of the two chips and including an aperture in the dielectric layer over the second pad;
- and
- discharge handling circuitry coupled to the second pad.
A proximity communication system, comprising:
- a first chip including:
- a plurality of first proximity pads formed in a first array at its surface,
- a plurality of receivers connected to respective ones of the first proximity pads for receiving signals impressed on the first proximity pads,
- a first attractor pad formed at the surface of the first chip,
- a first discharge protection circuit coupled to the first attractor pad, and
- a first dielectric layer formed over the surface of the first chip and covering the first proximity pads but including an aperture over the first attractor pad;
- and
- a second chip juxtaposed to the first chip and including
- a plurality of second proximity pads formed in a second array at its surface in alignment with the first proximity pads for impressing signals on the second proximity pads, and
- a second dielectric layer formed over the surface of the first chip and covering the second proximity pads, wherein respective pairs of the first and second proximity pads are capacitively coupled across the first and second dielectric layers to provide proximity communication between the first and second chips.
Dependencies are inferred from the claim text.