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US 8,013,915 B2Granted
Anti-eclipsing circuit for image sensors
AssigneeMicron Technology, Inc.
InventorsJi Soo Lee, Richard Johnson, Joey Shah
Life of this patent
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Abstract
An anti-eclipse circuit of an image pixel includes a clamping circuit for pulling up a voltage of a reset signal output by the pixel and an eclipse detection circuit for controllably coupling the clamping circuit output to the output of the pixel. The clamping circuit includes a source follower transistor and a switching transistor. The eclipse detection circuit includes a comparator that is operated to detect an eclipse condition. The eclipse detection circuit outputs a control signal to cause the switching transistor to conduct only when a eclipse condition is detected while the pixel is outputting a reset signal.
Claims23
A correction circuit for an image pixel, comprising:
- a signal circuit comprising a power source, a source follower transistor coupled to said power source and outputting a correction signal, at least one control transistor configured to control a level of said correction signal, and a switch for controllably supplying said correction signal to an output of said pixel;
- and
- a detection circuit for detecting a low voltage condition in a reset signal component of said output of said pixel and for controlling said switch to cause said switch to supply said correction signal to said output of said pixel only when said low voltage condition is detected by said detection circuit.
A correction circuit for an image pixel, comprising:
- a signal circuit comprising a signal generator for generating a correction signal, and a switch for controllably supplying said correction signal to an output of said pixel;
- and
- a detection circuit for detecting a low voltage condition in a reset signal component of said output of said pixel and for controlling said switch to cause said switch to supply said correction signal to said output of said pixel only when said low voltage condition is detected by said detection circuit,
- wherein said detection circuit comprises:
- a comparator having a first input coupled to said output of said pixel and a second input coupled to a reference voltage, said comparator outputting a first control signal;
- and
- a logic gate having one input accepting said first control signal and another input accepting a second control signal, wherein said logic gate outputs a third control signal for controlling a state of said switch.
4 more elements
A pixel array, comprising:
- a plurality of pixels, said plurality of pixels comprising a plurality of imaging pixels which image and a plurality of barrier pixels which do not image, said plurality of pixels arranged into a plurality of rows;
- a plurality of signal circuits, each signal circuit comprising:
- a power source;
- a source follower transistor coupled to said power source and outputting a correction signal;
- a control transistor configured to control a level of said correction signal;
- and
- a switch for controllably supplying said correction signal to an output of one of said imaging pixels;
- and
- a plurality of detection circuits for detecting a low voltage condition in a reset signal component of an output of a respective one of said imaging pixels and for controlling a respective one of said switches to supply a respective correction signal to said respective output only when said low voltage condition is detected.
6 more elements
A pixel array, comprising:
- a plurality of pixels, said plurality of pixels comprising a plurality of imaging pixels which image and a plurality of barrier pixels which do not image, said plurality of pixels arranged into a plurality of rows;
- a plurality of signal circuits, each signal circuit comprising:
- a respective signal generator for generating a respective correction signal, and a respective switch for controllably supplying said respective correction signal to a respective output of one of said imaging pixels;
- and
- a plurality of detection circuits each for detecting a low voltage condition in a reset signal component of an output of a respective one of said imaging pixels and for controlling a respective one of said switches to cause said respective switch to supply a respective correction signal to said respective output of one of said imaging pixels only when said low voltage condition is detected by one of said detection circuits,
- wherein each detection circuit comprises:
- a comparator having a first input coupled to said output and a second input coupled to a reference voltage, wherein said comparator outputs a first control signal in a first state when a voltage of said reset signal is less than said reference voltage, and
- a logic gate having one input accepting said first control signal and another input accepting a second control signal, wherein said logic gate outputs a third control signal for controlling a state of said switch in said signal circuit.
5 more elements
An imaging device, comprising:
- a plurality of pixels, said plurality of pixels comprising a plurality of imaging pixels which image and a plurality of barrier pixels which do not image, said plurality of pixels arranged into a plurality of rows;
- a plurality of signal circuits, each signal circuit comprising:
- a signal generator for generating a correction signal, wherein a respective barrier pixel of said plurality of barrier pixels is incorporated into said signal generator;
- and
- a switch for controllably supplying said correction signal to an output of one of said imaging pixels;
- and
- a plurality of detection circuits for detecting a low voltage condition in a reset signal component of an output of a respective one of said imaging pixels and for controlling a respective one of said switches to supply a respective correction signal to said respective output only when said low voltage condition is detected;
- an image processing circuit, coupled to, and for receiving outputs from, said imaging pixels and said signal circuits, to produce a digital output;
- and
- a storage device, coupled to said image processing circuit, for receiving and storing said digital output.
7 more elements
An imaging device, comprising:
- a plurality of pixels, said plurality of pixels comprising a plurality of imaging pixels which image and a plurality of barrier pixels which do not image, said plurality of pixels arranged into a plurality of rows;
- a plurality of signal circuits, each signal circuit comprising:
- a respective signal generator for generating a respective correction signal;
- and a respective switch for controllably supplying said respective correction signal to a respective output of one of said imaging pixels;
- a plurality of detection circuits each for detecting a low voltage condition in a reset signal component of an output of a respective one of said imaging pixels and for controlling a respective one of said switches to cause said respective switch to supply a respective correction signal to said respective output of one of said imaging pixels only when said low voltage condition is detected by one of said detection circuits;
- an image processing circuit, coupled to, and for receiving outputs from, said imaging pixels and said signal circuits, to produce a digital output;
- and
- a storage device, coupled to said image processing circuit, for receiving and storing said digital output,
- wherein each detection circuit comprises:
- a comparator having a first input coupled to said output of said respective imaging pixel and a second input coupled to a reference voltage, wherein said comparator outputs a first control signal in a first state when a voltage of said reset signal is less than said reference voltage;
- and a logic gate having one input accepting said first control signal and another input accepting a second control signal, wherein said logic gate outputs a third control signal for controlling a state of said switch in said signal circuit.
8 more elements
A processing system, comprising:
- a processor;
- an imaging device coupled to said processor, said imaging device comprising:
- a pixel array, said pixel array comprising:
- a plurality of pixels, said plurality of pixels comprising a plurality of imaging pixels which image and a plurality of barrier pixels which do not image, said plurality of pixels arranged into a plurality of rows;
- a plurality of signal circuits, each signal circuit comprising:
- a power source;
- a source follower transistor coupled to said power source and outputting a correction signal;
- a control transistor configured to control a level of said correction signal;
- and
- a switch for controllably supplying said correction signal to an output of one of said imaging pixels;
- a plurality of detection circuits for detecting a low voltage condition in a reset signal component of an output of a respective one of said imaging pixels and for controlling a respective one of said switches to supply a respective correction signal to said respective output only when said low voltage condition is detected;
- an image processing circuit, coupled to, and for receiving outputs from, said imaging pixels and said signal circuits, to produce a digital output;
- and
- a storage device, coupled to said image processing circuit, for receiving and storing said digital output.
11 more elements
Dependencies are inferred from the claim text.