Radio frequency power amplifier
AssigneePanasonic Corporation
InventorsSatoshi Makioka, Masahiko Inamori, Motoyoshi Iwata
Life of this patent
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Abstract
An RF power amplifier according to an implementation of the present invention includes: a first power amplifier which linearly amplifies a first RF signal of a first frequency band; a second power amplifier which linearly amplifies a second RF signal of a second frequency band lower than the first frequency band; a third power amplifier which nonlinearly amplifies a third RF signal of the first frequency band; a fourth power amplifier which nonlinearly amplifies a fourth RF signal of the second frequency band, and input lines of the respective power amplifiers do not cross each other on semiconductor substrates, and the output lines of the respective power amplifiers do not cross each other on the semiconductor substrates.
Claims16
A radio frequency power amplifier which amplifies radio frequency signals of two frequency bands, said radio frequency power amplifier comprising:
- a first power amplifying circuit which linearly amplifies a first radio frequency signal of a first frequency band;
- a second power amplifying circuit which linearly amplifies a second radio frequency signal of a second frequency band lower than the first frequency band;
- a third power amplifying circuit which nonlinearly amplifies a third radio frequency signal of the first frequency band;
- and
- a fourth power amplifying circuit which nonlinearly amplifies a fourth radio frequency signal of the second frequency band,
- wherein said first power amplifying circuit includes:
- a first input pad formed on a semiconductor substrate;
- a first input line formed on said semiconductor substrate and having one end connected to said first input pad;
- a first power amplifier formed on said semiconductor substrate and connected to the other end of said first input line;
- a first output line formed on said semiconductor substrate and having one end connected to said first power amplifier;
- and
- a first output pad formed on said semiconductor substrate and connected to the other end of said first output line,
- said second power amplifying circuit includes:
- a second input pad formed on said semiconductor substrate;
- a second input line formed on said semiconductor substrate and having one end connected to said second input pad;
- a second power amplifier formed on said semiconductor substrate and connected to the other end of said second input line;
- a second output line formed on said semiconductor substrate and having one end connected to said second power amplifier;
- and
- a second output pad formed on said semiconductor substrate and connected to the other end of said second output line,
- said third power amplifying circuit includes:
- a third input pad formed on said semiconductor substrate;
- a third input line formed on said semiconductor substrate and having one end connected to said third input pad;
- a third power amplifier formed on said semiconductor substrate and connected to the other end of said third input line;
- a third output line formed on said semiconductor substrate and having one end connected to said third power amplifier;
- and
- a third output pad formed on said semiconductor substrate and connected to the other end of said third output line,
- said fourth power amplifying circuit includes:
- a fourth input pad formed on said semiconductor substrate;
- a fourth input line formed on said semiconductor substrate and having one end connected to said fourth input pad;
- a fourth power amplifier formed on said semiconductor substrate and connected to the other end of said fourth input line;
- a fourth output line formed on said semiconductor substrate and having one end connected to said fourth power amplifier;
- and
- a fourth output pad formed on said semiconductor substrate and connected to the other end of said fourth output line,
- said first output pad and said second output pad are disposed next to each other,
- said third output pad and said fourth output pad are disposed next to each other,
- said first to fourth input lines do not cross each other on said semiconductor substrate, and
- said first to fourth output lines do not cross each other on said semiconductor substrate.
Dependencies are inferred from the claim text.