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US 8,013,588 B2Granted
Reference voltage circuit
AssigneeSeiko Instruments Inc.
InventorTakashi Imura
Life of this patent
Estimating the term…
Abstract
Provided is a reference voltage circuit capable of generating a temperature-independent reference voltage more stably. Each of N-type metal oxide semiconductor (NMOS) transistors (1) and (2) has a source and a back gate that are short-circuited, and hence threshold voltages (Vth1) and (Vth2) of the NMOS transistors (1) and (2) respectively depend only on process fluctuations in the NMOS transistors (1) and (2) and not on process fluctuations in other elements. As a result, a temperature-independent reference voltage (Vref) may be generated more stably.
Claims14
A reference voltage circuit for generating a reference voltage, comprising:
- a first power supply terminal;
- a second power supply terminal;
- a current supply circuit that has an input terminal to which a current is input, and a first output terminal and a second output terminal from each of which a current determined based on the current flowing through the input terminal is output;
- a first resistor;
- a first non-depletion mode metal oxide semiconductor (MOS) transistor of a first conductivity type,
- the first MOS transistor having a gate connected to the first output terminal, a source and a back gate that are connected to the first power supply terminal, and a drain connected to the first output terminal via the first resistor,
- the first MOS transistor operating in weak inversion;
- a second non-depletion mode MOS transistor of the first conductivity type,
- the second MOS transistor having a gate connected to a connection point between the first resistor and the first MOS transistor, a source and a back gate that are connected to the first power supply terminal, and a drain connected to the input terminal,
- the second MOS transistor having an absolute value of a threshold voltage of the second MOS transistor smaller than an absolute value of a threshold voltage of the first MOS transistor,
- the second MOS transistor operating in weak inversion,
- wherein a value of the threshold voltage is independent of structural variations in the first resistor and wherein a difference in the threshold voltage of the first and second MOS transistors is independent of structural variations in the first resistor;
- and
- a second resistor across which the reference voltage is generated,
- the second resistor being provided between the second output terminal and the first power supply terminal.
12 more elements
A reference voltage circuit for generating a reference voltage, comprising:
- a first power supply terminal;
- a second power supply terminal;
- a current supply circuit that has an input terminal to which a current is input, and an output terminal from which a current determined based on the current flowing through the input terminal is output;
- a first resistor;
- a first non-depletion mode MOS transistor of a second conductivity type,
- the first MOS transistor having a gate connected to the output terminal, a source and a back gate that are connected to the second power supply terminal, and a drain connected to the output terminal via the first resistor,
- the first MOS transistor operating in weak inversion;
- a second non-depletion mode MOS transistor of the second conductivity type,
- the second MOS transistor having a gate connected to a connection point between the first resistor and the first MOS transistor, a source and a back gate that are connected to the second power supply terminal, and a drain connected to the input terminal,
- the second MOS transistor having an absolute value of a threshold voltage of the second MOS transistor smaller than an absolute value of a threshold voltage of the first MOS transistor,
- the second MOS transistor operating in weak inversion,
- wherein a value of the threshold voltage is independent of structural variations in the first resistor and wherein a difference in the threshold voltage of the first and second MOS transistors is independent of structural variations in the first resistor;
- a third MOS transistor of the second conductivity type,
- the third MOS transistor having a gate connected to the output terminal, and a source and a back gate that are connected to the second power supply terminal;
- and
- a second resistor across which the reference voltage is generated,
- the second resistor being provided between a drain of the third MOS transistor and the first power supply terminal.
14 more elements
Dependencies are inferred from the claim text.