Low resistance high reliability contact via and metal line structure for semiconductor device

A method for forming a semiconductor device, said method comprising:

• using an atomic layer deposition (ALD) method to deposit a TaN layer along sidewalls and covering a bottom surface of an opening extending through a dielectric layer;
• forming a barrier layer on said TaN layer, said barrier layer being one of a Cr-based barrier layer, a V-based barrier layer, a Nb-based barrier layer and a Ti-based barrier layer;
• and
• depositing Cu in said opening such that said Cu contacts said barrier layer and substantially fills said opening, thereby forming a conductive structure in said opening.

A semiconductor device comprising:

• a conductive structure disposed within a dielectric, said conductive structure comprising:
• a composite barrier layer lining an opening formed in said dielectric, said composite barrier layer including a TaN layer along sidewalls and a bottom of said opening and an Mn-based layer along said TaN layer;
• and
• Cu substantially filling said opening and bounding said Mn-based layer,
• said TaN layer including a thickness within a range of about 2-100 angstroms.