Package with heat transfer
AssigneeUTAC Thai Limited
InventorsSaravuth Sirinorakul, Somchai Nondhasitthichai
Life of this patent
Estimating the term…
Abstract
A semiconductor package includes an encapsulant, a semiconductor die within the encapsulant, and a terminal for electrically coupling the semiconductor die to a node exterior to the package. The package further includes solder coupling the semiconductor die to the terminal. The semiconductor package is configured to dissipate heat through a top surface of the package. To directly dissipate heat via the top surface of the package, a portion of the semiconductor die is preferably exposed at the top surface of the package. Alternatively, instead of having a semiconductor device or die directly exposed at a surface of the package, a layer of thermally conductive material is coupled to the semiconductor device, and the layer is exposed at a surface of the package.
Claims20
A package for a semiconductor device, the package comprising:
- the semiconductor device;
- a terminal coupled to the semiconductor device, a portion of the terminal exposed at a surface of the package;
- a thermal cushion coupled to the semiconductor device, the thermal cushion comprising an epoxy, wherein the thermal cushion is configured to absorb impact to the semiconductor device, wherein the epoxy has a width dimension that is the same as the width of the surface of the package;
- a molding compound encapsulating the semiconductor device;
- and
- a cap coupled to the semiconductor device, wherein the cap has a dimension that varies from the interior to the exterior of the package, the cap comprising interlocking features located at a bottommost edge of the cap that overhangs the semiconductor device, each projecting into the molding compound.
A package for a semiconductor device, the package comprising:
- the semiconductor device;
- a terminal leadframe coupled to the semiconductor device, a portion of the terminal leadframe exposed at a surface of the package;
- a thermal cushion coupled to the semiconductor device, the thermal cushion configured to absorb impact to the semiconductor device;
- a molding compound encapsulating the semiconductor device;
- and
- a cap coupled to the semiconductor device, wherein a smaller portion of the cap and a larger portion of the cap form interlocking features located at a bottommost edge of the cap that overhangs the semiconductor device, each extending into the molding compound, wherein the smaller portion of the cap has a width dimension that is the same as the width of the thermal cushion.
A package for a semiconductor device, the package comprising:
- the semiconductor device;
- a terminal leadframe coupled to the semiconductor device;
- a thermal cushion coupled to the semiconductor device, wherein the thermal cushion has a width that is greater than the width of the semiconductor device;
- a molding compound encapsulating the semiconductor device;
- and
- a cap coupled to the semiconductor device, wherein a smaller portion of the cap and a larger portion of the cap form at least one interlocking feature located at a bottommost edge of the cap that overhangs the semiconductor device, extending into the molding compound, wherein the smaller portion of the cap has a width dimension that is the same as the width of the semiconductor device.
Dependencies are inferred from the claim text.