Semiconductor device including DC-DC converter

A semiconductor device including a DC-DC converter, comprising:

• a first die pad having a first lead for use as an input for the DC-DC converter;
• a second die pad having a second lead for use as an output for the DC-DC converter;
• a third die pad having a third lead;
• a fourth lead to supply a ground potential to the DC-DC converter;
• a first semiconductor chip including a high side MOSFET of the DC-DC converter, the first semiconductor chip being disposed over the first die pad,
• the first semiconductor chip having a top surface and a bottom surface opposite the top surface,
• the first semiconductor chip having a first gate electrode pad and a first source electrode pad on the top surface, and a first drain electrode on the bottom surface,
• the first drain electrode being coupled to the first die pad;
• a second semiconductor chip including a low side MOSFET of the DC-DC converter, the second semiconductor chip being disposed over the second die pad,
• the second semiconductor chip having a top surface and a bottom surface opposite the top surface,
• the second semiconductor chip having a second gate electrode pad and a second source electrode pad on the top surface, and a second drain electrode on the bottom surface,
• the second drain electrode being coupled to the second die pad;
• a third semiconductor chip disposed over the third die pad,
• the third semiconductor chip including a first driver circuit to drive the high side MOSFET and a second driver circuit to drive the low side MOSFET;
• a resin body covering the first, second, and third semiconductor chips,
• portions of the first, second, third, and fourth leads and portions of the first, second, and third die pads being exposed from the resin body;
• a first metal plate coupled to the first source electrode pad of the first semiconductor chip and the second die pad;
• and
• a second metal plate coupled to the second source electrode pad of the second semiconductor chip and the fourth lead,
• wherein the third semiconductor chip has a first pad and a second pad,
• wherein the first pad of the third semiconductor chip is electrically coupled to an output of the first driver circuit,
• wherein the second pad of the third semiconductor chip is electrically coupled to an output of the second driver circuit,
• wherein the first pad of the third semiconductor chip and the first gate electrode pad of the first semiconductor chip are coupled via a first bonding wire,
• wherein the second pad of the third semiconductor chip and the second gate electrode pad of the second semiconductor chip are coupled via a second bonding wire,
• wherein each of the first and second semiconductor chips has a rectangular shape in plan view, with a pair of long sides and a pair of short sides,
• wherein the first bonding wire is disposed so as to overlap in plan view one of the short sides of the first semiconductor chip,
• wherein the second bonding wire is disposed so as to overlap in plan view one of the long sides of the second semiconductor chip, and
• wherein the second metal plate is disposed so as to overlap in plan view the other of the long sides and one of the short sides of the second semiconductor chip.