Semiconductor component and semiconductor device

A semiconductor device comprising a first semiconductor component and a second semiconductor component, which are insulated from each other,

• the first semiconductor component comprising:
• a first mixed crystal layer of silicon and germanium containing a III-group impurity, provided with a first main surface having with a first face orientation alone which is represented as a face (11N) by using N satisfying 1.2<N<10 or which is crystallographically equivalent to the face (11N) in the first main surface, a compressive strain being applied to the first mixed crystal layer along an in-plane direction of the first main surface;
• a first dielectric layer formed on the first main surface;
• a first gate electrode formed on the first dielectric layer;
• and
• first source/drain regions formed to sandwich the first gate electrode in a direction [110] of the first mixed crystal layer or in a direction crystallographically equivalent the direction [110] and containing a V-group impurity, and
• the second semiconductor component comprising:
• a second mixed crystal layer of silicon and germanium containing a V-group impurity, and provided with a second main surface having a second main orientation of a face (110) or a face crystallographically equivalent to the face (110), a compressive strain being applied to the second mixed crystal layer along an in-plane direction of the second main surface;
• a second dielectric layer formed on the second main surface;
• a second gate electrode formed on the second dielectric layer;
• and
• second source/drain regions formed to sandwich the second gate electrode in a direction [110] of the second mixed crystal layer or in a direction crystallographically equivalent to the direction [110] and containing a III-group impurity.

A semiconductor device comprising a first semiconductor component and a second semiconductor component insulated from each other,

• the first semiconductor component comprising:
• a first mixed crystal layer of silicon and germanium provided with a first main surface having a surface of a first face orientation represented as a face (11N) by using N satisfying 1.2<N<10 or a face crystallographically equivalent to the face (11N), a compressive strain being applied to the first main surface along an in-plane direction;
• a first semiconductor region formed in the first mixed crystal layer and containing a III-group impurity;
• a first dielectric layer formed on the first semiconductor region;
• a first gate electrode formed on the first dielectric layer;
• and
• first source/drain regions formed to sandwich the first gate electrode in a direction [110] of the first mixed crystal layer or in a direction crystallographically equivalent to the direction [110], and containing a V-group impurity, and
• the second semiconductor component comprising:
• a second mixed crystal layer of silicon and germanium having the first face orientation, a compressive strain being applied to the first main surface along an in-plane direction;
• a second semiconductor region formed on the second mixed crystal layer and containing a V-group impurity;
• a second dielectric layer formed on the second semiconductor region;
• a second gate electrode formed on the second dielectric layer;
• and
• second source/drain regions formed to sandwich the second gate electrode in a direction [110] or in a direction crystallographically equivalent to the direction [110] and containing a III-group impurity.