Semiconductor architecture having field-effect transistors especially suitable for analog applications

A semiconductor structure comprising like-polarity first and second field-effect transistors (“FETs”) provided along an upper surface of a semiconductor body having primary body material doped with semiconductor dopant of a first conductivity type so as to be of the first conductivity type, each FET comprising:

• a channel zone of the body material;
• first and second source/drain (“S/D”) zones situated in the semiconductor body along its upper surface, laterally separated by the channel zone, and being of a second conductivity type opposite to the first conductivity type so as to form respective pn junctions with the body material such that (a) each pn junction reaches a maximum depth below the body's upper surface, (b) the body material extends laterally under both S/D zones, and (c) the dopant of the first conductivity type is present in both S/D zones and has a concentration which locally reaches a main subsurface maximum concentration at a main subsurface body-material location extending laterally below largely all of each of the channel and S/D zones, and (d) the main subsurface body-material location occurs no more than 10 times deeper below the body's upper surface than the maximum depth of the pn junction for each S/D zone;
• a gate dielectric layer overlying the channel zone;
• and
• a gate electrode overlying the gate dielectric layer above the channel zone wherein the concentration of the dopant of the first conductivity type (i) decreases by at least a factor of 10 in moving upward from the main subsurface body-material location for the first FET along a selected first vertical line through a specified one of the S/D zones of the first FET to the body's upper surface, (ii) decreases substantially monotonically in moving from the main subsurface body-material location for the first FET along the first vertical line to the pn junction for the specified S/D zone of the first FET, and (iii) increases, or decreases by less than a factor of 10, in moving upward from the main subsurface body-material location for the second FET along a selected second vertical line through either S/D zone of the second FET to the body's upper surface.