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US 8,013,376 B2Granted
Memory arrays, semiconductor constructions and electronic systems with transistor gates extending partially over SOI and unit cells within active region pedestals
AssigneeMicron Technology, Inc.
InventorKunal R. Parekh
Life of this patent
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Abstract
Some embodiments include DRAM having transistor gates extending partially over SOI, and methods of forming such DRAM. Unit cells of the DRAM may be within active region pedestals, and in some embodiments the unit cells may comprise capacitors having storage nodes in direct contact with sidewalls of the active region pedestals. Some embodiments include 0C1T memory having transistor gates entirely over SOI, and methods of forming such 0C1T memory.
Claims20
A semiconductor construction, comprising:
- a semiconductor material having a base and pedestals, each of the pedestals having a wider region joining the base through a narrower region;
- a dielectric material over the base, the dielectric material being between the wider regions of the pedestals and the base, and having openings therein through which the narrower regions of the pedestals pass;
- transistor gates adjacent the wider regions of the pedestals, each of the transistor gates having widths, wherein at least 25% of the widths of the transistor gates are over the dielectric material;
- and
- wherein the semiconductor material is a same composition throughout the base and the pedestals.
2 more elements
A semiconductor construction, comprising:
- a semiconductor material having a base and a plurality of pedestals extending upwardly from the base, the pedestals comprising wide upper regions joining the base through narrow stems;
- a dielectric material over the base, the dielectric material being between the wide upper regions and the base, and having openings therein through which the stems pass;
- and
- transistor gates within the wide upper regions, individual transistor gates having widths and having at least 25% of the widths directly over the dielectric material.
1 more element
A semiconductor construction, comprising:
- a semiconductor material having a base and a plurality of pedestals extending upwardly from the base, the pedestals comprising active regions joining the base through narrow stems;
- a dielectric material over the base;
- the dielectric material being between the active regions and the base, and having openings therein through which the stems pass;
- and
- conductive lines extending across the active regions, the conductive lines being paired across the individual of the active regions, segments of the conductive lines over the active regions said segments corresponding to charge storage devices.
2 more elements
An electronic system, comprising:
- a processor;
- and
- memory in data communication with the processor;
- the memory comprising:
- a semiconductor material having a base and a plurality of pedestals extending upwardly from the base, the pedestals comprising active regions joining the base through narrow stems;
- a dielectric material over the base;
- the dielectric material being between the active regions and the base, and having openings therein through which the stems pass;
- and
- conductive lines extending across the active regions, the conductive lines being paired across the individual of the active regions, segments of the conductive lines over the active regions corresponding to transistor gates and being entirely directly over the dielectric material.
6 more elements
Dependencies are inferred from the claim text.