Semiconductor device having MOS-transistor formed on semiconductor substrate and method for manufacturing thereof
AssigneeElpida Memory, Inc.
InventorHiroyuki Uchiyama
Life of this patent
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Abstract
A semiconductor device comprises MOS transistors sequentially arranged in the plane direction of a substrate, wherein a gate electrode and a wiring portion for connecting between the gate electrodes to each other are implanted into a layer that is lower than a surface of the substrate in which a diffusion layer has been formed. A first device isolation area with a STI structure for separating the diffusion layers that function as a source/drain area is formed on the surface of the substrate. A second device isolation area with the STI structure for separating channel areas of the MOS transistors adjacent to each other is formed in a layer that is lower than a layer that has the first device isolation area.
Claims11
A semiconductor device, comprising:
- MOS transistors sequentially arranged in a plane direction of a substrate;
- a first device isolation area for separating the diffusion layers that function as a source/drain area of the MOS transistors adjacent to each other on the surface of the substrate;
- and
- a second device isolation area for separating channel areas of the MOS transistors adjacent to each other in a layer that is lower than a layer that has the first device isolation area,
- wherein a gate electrode and a wiring portion for connecting between the gate electrodes to each other are disposed into a layer lower than a surface of the substrate in which a diffusion layer has been formed.
A semiconductor device, comprising:
- a substrate;
- a plurality of MOS transistors each having a gate electrode disposed under a top surface of the substrate;
- a wiring layer for connecting between the gate electrodes, the wiring layer being disposed under the top surface of the substrate, and the wiring layer extending in a first direction;
- a first isolation region formed in the substrate for separating source/drain areas of the MOS transistors adjacent to each other in the first direction;
- and
- a second isolation region formed in the substrate for separating channel areas of the MOS transistors adjacent to each other in the first direction,
- wherein the second isolation region is disposed under the wiring layer.
A method for manufacturing a semiconductor device comprising MOS transistors sequentially arranged in a plane direction of a substrate, comprising:
- forming a first device isolation area for separating diffusion layers that function as a source/drain area of the MOS transistors adjacent to each other on a surface of the substrate;
- and
- forming a second device isolation area for separating channel areas of the MOS transistors adjacent to each other in a layer that is lower than a layer that has the first device isolation area.
Dependencies are inferred from the claim text.