Ultra thin TCS (SiCl4) cell nitride for DRAM capacitor with DCS (SiH2Cl2) interface seeding layer

An integrated circuit, comprising:

• a silicon nitride layer comprising:
• a first nitride layer on and in contact with a silicon-comprising substrate and derived from dichlorosilane and ammonia, the first nitride layer having a thickness of up to about 8 angstroms;
• and
• a second nitride layer about 40-60 angstroms thick on and in contact with the first nitride layer and derived from silicon tetrachloride and ammonia.

An integrated circuit, comprising:

• a silicon nitride layer comprising:
• a first nitride layer on and in contact with a silicon-comprising substrate and derived from dichlorosilane and ammonia, the first nitride layer having a thickness of up to about 8 angstroms;
• and
• a second nitride layer on and in contact with the first nitride layer and having a thickness of up to about 60 angstroms and derived from silicon tetrachloride and ammonia.

An integrated circuit, comprising:

• a silicon nitride layer comprising:
• a nitride seed layer on and in contact with a silicon-comprising substrate, the nitride seed layer having a thickness of up to about 8 angstroms and derived from dichlorosilane and ammonia;
• and
• a nitride layer about 40-60 angstroms thick on and in contact with the nitride seed layer, the nitride layer derived from silicon tetrachloride and ammonia.

An integrated circuit, comprising:

• a silicon nitride layer comprising:
• a first nitride layer on and in contact with a silicon-comprising substrate selected from the group consisting of silicon, polysilicon, hemispherical grain polysilicon, a doped silicon, and a doped polysilicon, the first nitride layer having a thickness of up to about 8 angstroms and derived from dichlorosilane and ammonia;
• and
• a second nitride layer about 40-60 angstroms thick on and in contact with the first nitride layer, the second nitride layer derived from silicon tetrachloride and ammonia.

An integrated circuit, comprising:

• a silicon nitride layer comprising:
• a first nitride layer on and in contact with a substrate comprising at least two different material types, the first nitride layer having a thickness of up to about 8 angstroms and derived from dichlorosilane and ammonia;
• and
• a second nitride layer over and in contact with the first nitride layer and having a thickness of about 40-60 angstroms that is substantially equivalent over the at least two different material types of the substrate, the second nitride layer derived from silicon tetrachloride and ammonia.

An integrated circuit, comprising:

• a silicon nitride layer comprising:
• a first nitride layer on and in contact with a silicon material and an insulative material, the first nitride layer having a thickness of up to about 8 angstroms and derived from dichlorosilane and ammonia;
• and
• a second nitride layer over and in contact with the first nitride layer and having a thickness of about 40-60 angstroms that is substantially equivalent over the silicon material and the insulative material, the second nitride layer derived from silicon tetrachloride and ammonia.

A semiconductor wafer, comprising:

• a silicon nitride layer comprising:
• a nitride seed layer having a thickness of up to about 8 angstroms and derived from dichlorosilane and ammonia, and on and in contact with a silicon-comprising substrate;
• and
• a nitride layer about 40-60 angstroms thick and derived from silicon tetrachloride and ammonia, over and in contact with the nitride seed layer.

A semiconductor wafer, comprising:

• a silicon nitride layer comprising:
• a nitride seed layer derived from dichlorosilane and ammonia, on and in contact with a silicon-comprising substrate and having a thickness of up to about 8 angstroms;
• and
• a nitride layer derived from silicon tetrachloride and ammonia, over and in contact with the nitride seed layer and having a thickness of up to about 60 angstroms.

A semiconductor wafer, comprising:

• a silicon nitride layer on and in contact with a surface of at least two different substrate types, the silicon nitride layer comprising:
• a first nitride layer on and in contact with the surface of the at least two different substrate types, the first nitride layer having a thickness of up to about 8 angstroms and derived from dichlorosilane and ammonia;
• and
• a second nitride layer over and in contact with the first nitride layer and having a thickness of about 40-60 angstroms that is substantially equivalent over the at least two different substrate types, the second nitride layer derived from silicon tetrachloride and ammonia.

A memory cell, comprising:

• a silicon nitride layer comprising:
• a first nitride layer having a thickness of up to about 8 angstroms on and in contact with a silicon-comprising substrate, the first nitride layer derived from dichlorosilane and ammonia;
• and
• a second nitride layer having a thickness of up to about 60 angstroms over and in contact with the first nitride layer, the second nitride layer derived from silicon tetrachloride and ammonia.

A memory cell, comprising:

• a silicon nitride layer on and in contact with a surface of at least two different substrate types, the silicon nitride layer comprising:
• a first nitride layer on and in contact with the surface of the at least two different substrate types, the first nitride layer having a thickness of up to about 8 angstroms and derived from dichlorosilane and ammonia;
• and
• a second nitride layer over and in contact with the first nitride layer and having a thickness of about 40-60 angstroms that is substantially equivalent over the at least two different substrate types, the second nitride layer derived from silicon tetrachloride and ammonia.

A memory cell, comprising:

• a capacitor having a dielectric layer over and in contact with a silicon-comprising electrode, the dielectric layer comprising:
• a first nitride layer having a thickness of up to about 8 angstroms over and in contact with the silicon-comprising electrode, the first nitride layer derived from dichlorosilane and ammonia;
• and
• a second nitride layer having a thickness of up to about 60 angstroms over and in contact with the first nitride layer, the second nitride layer derived from silicon tetrachloride and ammonia.

A memory cell, comprising:

• a capacitor having a dielectric layer over and in contact with a silicon-comprising electrode and an insulative substrate, the dielectric layer comprising:
• a first nitride layer over and in contact with the silicon-comprising electrode and the insulative substrate, the first nitride layer having a thickness of up to about 8 angstroms and derived from dichlorosilane and ammonia;
• and
• a second nitride layer over and in contact with the first nitride layer and having a thickness of about 40-60 angstroms that is substantially equivalent over the silicon-comprising electrode and the insulative substrate, and derived from silicon tetrachloride and ammonia.

A memory module comprising:

• a memory cell with a capacitor having a dielectric layer over and in contact with a silicon-comprising electrode, the dielectric layer comprising:
• a first nitride layer having a thickness of up to about 8 angstroms on and in contact with the silicon-comprising electrode, the first nitride layer derived from dichlorosilane and ammonia;
• and
• a second nitride layer having a thickness of up to about 60 angstroms over and in contact with the first nitride layer, the second nitride layer derived from silicon tetrachloride and ammonia.

A memory module comprising:

• a memory cell with a capacitor having a dielectric layer over and in contact with a silicon-comprising electrode and an insulative substrate, the dielectric layer comprising:
• a first nitride layer having a thickness of up to about 8 angstroms and derived from dichlorosilane and ammonia, the first nitride layer on and in contact with the surface of the silicon-comprising electrode and the insulative substrate;
• and
• a second nitride layer derived from silicon tetrachloride and ammonia, the second nitride layer over and in contact with the first nitride layer and having a thickness of about 40-60 angstroms that is substantially equivalent over the silicon-comprising electrode and the insulative substrate.