US 8,013,324 B2 · Structurally stabilized semiconductor nanowire

Abstract

In one embodiment, a semiconductor nanowire having a monotonically increasing width with distance from a middle portion toward adjoining semiconductor pads is provided. A semiconductor link portion having tapered end portions is lithographically patterned. During the thinning process that forms a semiconductor nanowire, the taper at the end portions of the semiconductor nanowire provides enhanced mechanical strength to prevent structural buckling or bending. In another embodiment, a semiconductor nanowire having bulge portions are formed by preventing the thinning of a semiconductor link portion at pre-selected positions. The bulge portions having a greater width than a middle portion of the semiconductor nanowire provides enhanced mechanical strength during thinning of the semiconductor link portion so that structural damage to the semiconductor nanowire is avoided during thinning.

Claims20

Dependent claims

A semiconductor structure comprising:

a semiconductor nanowire having a constant-width portion located between a first end portion and a second end portion, wherein said constant-width portion has a constant first initial width between said first end portion and said second end portion;
a first semiconductor pad located on a substrate and adjoining said first end portion of said semiconductor nanowire, wherein said first end portion has a second initial width that is greater than said first initial width at an interface with said first semiconductor pad;
a second semiconductor pad located on said substrate and adjoining said second end portion of said semiconductor nanowire, wherein said second end portion has a first width that is greater than said second initial width at an interface with said second semiconductor pad;
a channel region located in said constant-width portion of said semiconductor nanowire and having a doping of a first conductivity type;
a gate dielectric located on and surrounding said channel region;
and
a gate electrode located on and surrounding said gate dielectric.

4 more elements

A semiconductor structure comprising a semiconductor nanowire located over a substrate, said semiconductor nanowire having a first constant-width portion, a second constant-width potion, a third constant-width portion, a first bulge portion, and a second bulge portion, wherein said first bulge portion is located between said first constant-width portion and said second constant-width portion, wherein said second bulge portion is located between said first constant-width portion and said third constant-width portion, wherein said first, second, and third constant-width portions have a first initial width, and wherein said first and second bulge portions have a second initial width that is greater than said first initial width, wherein said first constant-width portion, said second constant-width potion, said third constant-width portion, said first bulge portion, and said second bulge portion are single crystalline and epitaxially aligned among one another.

A method of forming a semiconductor structure comprising:

forming a semiconductor link portion having a constant width and laterally adjoined by a first semiconductor pad and a second semiconductor pad on a substrate;
forming two oxidation barrier portions over sub-portions of said semiconductor link portion;
forming oxidized material portions by converting exposed portions of said semiconductor link portion into a semiconductor oxide, wherein said two oxidation barrier portions prevent oxidation of said sub-portions;
and
removing said oxidized material portions, wherein remaining portions of said semiconductor link portion constitutes a semiconductor nanowire including three constant-width portions separated by two bulge portions having a greater width than said three constant-width portions.

2 more elements

Dependencies are inferred from the claim text.

Structurally stabilized semiconductor nanowire

Life of this patent

Structurally stabilized semiconductor nanowire

Life of this patent

Abstract

Claims20