Method of high voltage operation of field effect transistor

A method of high voltage operation of a field effect transistor, comprising:

• providing a field effect transistor that includes a substrate, a source region and a drain region spaced apart from each other in a surface of the substrate, a semiconductor channel formation region disposed in the surface of the substrate between the source region and the drain region, a gate region disposed above the channel formation region, and a gate insulating film region disposed between the channel formation region and the gate region;
• providing a bias circuit comprised of two serial-connected resistors having a first end connected to the drain region and a second end;
• supplying at least one of a signal electric potential and a signal current to the source region of the field effect transistor;
• supplying to the gate region of the field effect transistor a bias electric potential having an absolute value equal to or larger than a first constant electric potential which changes according to an increase or decrease in a drain electric potential;
• supplying to the second end of the two serial-connected resistors an electric potential of a high voltage power supply;
• and
• supplying a bias electric potential from a node between the two serial-connected resistors to the gate region.

A method of high voltage operation of a field effect transistor, comprising:

• providing a field effect transistor that includes a substrate, a source region and a drain region spaced apart from each other in a surface of the substrate, a semiconductor channel formation region disposed in the surface of the substrate between the source region and the drain region, a gate region disposed above the channel formation region, and a gate insulating film region disposed between the channel formation region and the gate region;
• providing a bias circuit comprised of a rectifying device having one side connected in series to the drain region, and a resistor connected to the rectifying device;
• supplying at least one of a signal electric potential and a signal current to the source region of the field effect transistor;
• supplying to the gate region of the field effect transistor a bias electric potential having an absolute value equal to or larger than a first constant electric potential which changes according to an increase or decrease in a drain electric potential;
• supplying a first constant electric potential to a side of the resistor;
• and
• supplying a bias electric potential from a node between the rectifying device and the resistor to the gate region.