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US 8,012,807 B2Granted
Method for producing chip packages, and chip package produced in this way
AssigneeInfineon Technologies AG
InventorsThorsten Meyer, Harry Hedler, Markus Brunnbauer
Life of this patent
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Abstract
A method for producing chip packages is disclosed. In one embodiment, a plurality of chips is provided. The chips each have first pads. Second connection pads are applied on the wafer, wherein each second pad is electrically connected to a first pad.
Claims21
A method for producing chip packages comprising:
- providing a semiconductor wafer comprising a plurality of semiconductor chips, the semiconductor chips having first connection pads;
- and thereafter
- applying second connection pads on the semiconductor wafer, including electrically connecting second connection pads to the first connection pads;
- separating the semiconductor wafer into individual semiconductor chips;
- producing a reconstituted wafer from mold compound in which a plurality of the semiconductor chips are encapsulated;
- applying third connection pads to the reconstituted wafer;
- and
- electrically connecting at least some of the third connection pads to the second connection pads using a thin-film process technology.
5 more elements
A method for producing chip packages comprising:
- providing a semiconductor wafer comprising a plurality of semiconductor chips, the semiconductor chips having first connection pads;
- applying a first layer of dielectric over the semiconductor wafer;
- forming second connection pads on the first dielectric layer and electrically connecting second connection pads to the first connection pads through vias in the first dielectric layer;
- separating the semiconductor wafer into individual semiconductor chips;
- producing a reconstituted wafer from mold compound in which a plurality of the semiconductor chips are encapsulated;
- applying a second layer of dielectric over the reconstituted wafer;
- forming third connection pads on the second dielectric layer and electrically connecting at least some of the third connection pads to the second connection pads through vias in the second dielectric layer;
- and
- separating the reconstituted wafer into individual chip packages.
6 more elements
Dependencies are inferred from the claim text.