Nonvolatile memory cell comprising a chalcogenide and a transition metal oxide
AssigneeInternational Business Machines Corporation
InventorsChung Hon Lam, Gerhard Ingmar Meijer, Alejandro Gabriel Schrott
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Abstract
A memory cell for use in integrated circuits comprises a chalcogenide feature and a transition metal oxide feature. Both the chalcogenide feature and transition metal oxide feature each have at least two stable electrical resistance states. At least two bits of data can be concurrently stored in the memory cell by placing the chalcogenide feature into one of its stable electrical resistance states and by placing the transition metal oxide feature into one of its stable electrical resistance states.
Claims16
A method of forming a memory cell comprising the steps of:
- forming a chalcogenide feature having at least two stable electrical resistance states;
- forming a transition metal oxide feature having at least two stable electrical resistance states;
- and
- doping the transition metal oxide feature with chromium, manganese or vanadium;
- wherein at least two bits of data can be concurrently stored in the memory cell by placing the chalcogenide feature into one of the at least two stable electrical resistance states of the chalcogenide feature and by placing the transition metal oxide feature into one of the at least two stable electrical resistance states of the transition metal oxide feature.
A method of forming a memory cell comprising the steps of:
- forming a first electrode;
- forming a chalcogenide feature having at least two stable electrical resistance states;
- forming a transition metal oxide feature having at least two stable electrical resistance states;
- and
- forming a second electrode,
- the method of forming the memory cell characterized in that the chalcogenide feature and transition metal oxide feature are serially formed between the first and second electrodes to allow a single pulse of electrical current to flow through the serially formed chalcogenide and transition metal oxide features in either direction between the first and second electrodes so that at least two bits of data can be concurrently stored in the memory cell by placing the chalcogenide feature into one of the at least two stable electrical resistance states of the chalcogenide feature and by placing the transition metal oxide feature into one of the at least two stable electrical resistance states of the transition metal oxide feature.
A method of forming a memory cell comprising the steps of:
- forming a first electrode;
- forming a first resistive feature, comprising a chalcogenide materal, having at least two stable electrical resistance states;
- forming a second resistive feature, comprising a transition metal oxide material, having at least two stable electrical resistance states;
- and
- forming a second electrode,
- wherein the first and second resistive features are serially formed between the firat and second electrodes, and
- wherein at least two bits of data can be concurrently stored in the memory cell by placing the first resistive feature into one of the at least two stable electrical resistance states of the first resistive feature and by placing the second resistive feature into one of the at least two stable electrical resistance states of the second resistive feature.
Dependencies are inferred from the claim text.