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US 8,009,497 B2Granted
Auto-refresh control circuit and a semiconductor memory device using the same
AssigneeHynix Semiconductor Inc.
InventorHyung-Wook Moon
Life of this patent
Estimating the term…
Abstract
An auto-refresh control circuit includes a control signal generating section configured to simultaneously or individually enable first and second control signals in response to an information combination signal having refresh information and operation mode information and first and second chip selection signals, and an auto-refresh signal generating section configured to generate first and second auto-refresh signals in response to a plurality of command signals and the first and second control signals.
Claims16
An auto-refresh control circuit, comprising:
- a control signal generating section configured to simultaneously or individually enable first and second control signals in response to an information combination signal having refresh information and operation mode information and first and second chip selection signals;
- an auto-refresh signal generating section configured to generate first and second auto-refresh signals in response to a plurality of command signals and the first and second control signals;
- a signal combining section configured to be input with a refresh information signal having the refresh information and an operation mode signal having the operation mode information and to generate the information combination signal;
- and
- a refresh information signal generating section configured to be input with an auto-refresh mode signal and a clock enable signal and generate the refresh information signal.
2 more elements
A semiconductor memory device, comprising:
- a first rank performing auto-refresh operation in response to a first auto-refresh signal;
- a second rank performing auto-refresh operation in response to a second auto-refresh signal;
- an auto-refresh control circuit configured to simultaneously or individually enable the first and second auto-refresh signals in response to an information combination signal having refresh information and operation mode information, first and second chip selection signals, and a plurality of command signals;
- a signal combining section configured to be input with a refresh information signal having the refresh information and an operation mode signal having the operation mode information and generating the information combination signal;
- and
- a refresh information signal generating section configured to be input with an auto-refresh mode signal and a clock enable signal and generate the refresh information signal,
- wherein the auto-refresh control circuit comprises:
- a control signal generating section configured to simultaneously or individually enable first and second control signals in response to the information combination signal and the first and second chip selection signals;
- and
- an auto-refresh signal generating section configured to generate the first and second auto-refresh signals in response to the plurality of command signals and the first and second control signals.
7 more elements
Dependencies are inferred from the claim text.