Read circuit and read method
AssigneeKabushiki Kaisha Toshiba
InventorsMasanori Furuta, Daisuke Kurose, Tsutomu Sugawara
Life of this patent
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Abstract
In a read circuit, a write circuit writes a data to be stored and/or a test data to the memory cell. A control circuit controls the write circuit to write the test data to the memory cell in a first phase, and to write the test data which is same as the first phase to the memory cell in a second phase. An integrator integrates voltages at one terminal of the memory cell during the first phase to obtain a first integrated voltage, and integrates voltages at one terminal of the memory cell during the second phase to obtain a second integrated voltage. A buffer stores the first integrated voltage. A comparator compares the first integrated voltage from the buffer with the second integrated voltage from the integrator to obtain the data.
Claims8
A read circuit for reading a data from a memory cell, comprising:
- a write circuit to write the data to be stored and/or a test data to the memory cell;
- a control circuit which controls the write circuit to write the test data to the memory cell in a first phase, and to write the test data which is same as the first phase to the memory cell in a second phase;
- an integrator which integrates voltages at one terminal of the memory cell during the first phase to obtain a first integrated voltage, and integrates voltages at one terminal of the memory cell during the second phase to obtain a second integrated voltage;
- a buffer to store the first integrated voltage;
- and
- a comparator which compares the first integrated voltage from the buffer with the second integrated voltage from the integrator to obtain the data.
A method for reading a data from a memory cell, comprising:
- writing a test data to the memory cell in a first phase;
- integrating voltages at one terminal of the memory cell during the first phase to obtain a first integrated voltage;
- writing the test data which is same as the first phase to the memory cell in a second phase;
- integrating voltages at one terminal of the memory cell during the second phase to obtain a second integrated voltage;
- and
- comparing the first integrated voltage with the second integrated voltage to obtain the data.
Dependencies are inferred from the claim text.