Low-wear writing in a solid state memory device

A system comprising:

• a non-volatile memory, wherein the memory includes a plurality of cells, wherein each of the plurality of cells is configured to a plurality of values, wherein each of the plurality of values is represented by N digits where N is an integer greater than 1, wherein each of the plurality of cells is further configured to store electric charge representing a plurality of voltage levels, wherein each of the plurality of voltage levels represents one of the plurality of values;
• and
• at least one controller configured to:
• provide the plurality of voltage levels into a first group of voltage levels and a second group of voltage levels in one of the plurality of cells, wherein a highest voltage level of the first group is less than or substantially equal to a lowest voltage level of the second group;
• and
• store, in the first group of voltage levels, electric charge representing a value comprising, at most, N-1 digits.

A computer-readable medium comprising instructions encoded on the computer-readable medium that, upon execution, cause a controller within a device to:

• program a non-volatile memory, wherein the memory includes a plurality of cells, wherein each of the plurality of cells is configured to store a plurality of values, wherein each of the plurality of values is represented by N digits where N is an integer greater than 1, wherein each of the plurality of cells is further configured to store electric charge representing a plurality of voltage levels, wherein programming the non-volatile memory comprises:
• providing the plurality of voltage levels into a first group of voltage levels and a second group of voltage levels in one of the plurality of cells, wherein a highest voltage level of the first group is less than or substantially equal to a lowest voltage level of the second group;
• and
• storing, in the first group of voltage levels, electric charge representing a value comprising, at most, N-1 digits.

A method of programming a non-volatile memory comprising a plurality of cells, the method comprising:

• determining a first set of L cells of the plurality of cells, wherein each cell of the first set is configured to store electric charge representing 2M voltage levels, wherein L and M are integers, wherein each of the plurality of voltage levels represents one of 2M values, and wherein each of the 2M values is represented by M digits;
• determining, based on L, M, and X, a second set of K cells of the plurality of cells, wherein K and X are integers and wherein K is not equal to L, wherein X represents a plurality of voltage levels in each cell of the second set of K cells;
• and
• storing electric charge representing one of the X voltage levels in at least one cell of the second set of K cells, wherein the one of the X voltage levels represents a value comprising P digits, and wherein P is an integer or non-integer and not equal to M.

A system comprising:

• a non-volatile memory comprising a plurality of cells;
• and
• at least one controller configured to:
• determine a first set of L cells of the plurality of cells, wherein each cell of the first set is configured to store electric charge representing 2M voltage levels, wherein L and M are integers, wherein each of the plurality of voltage levels represents one of 2M values, and wherein each of the 2M values is represented by M digits;
• determine, based on L, M, and X, a second set of K cells of the plurality of cells, wherein K and X are integers and wherein K is not equal to L, wherein X represents a plurality of voltage levels in each cell of the second set of K cells;
• and
• store electric charge representing one of the X voltage levels in at least one cell of the second set of K cells, wherein the one of the X voltage levels represents a value comprising P digits, wherein P is an integer or non-integer and not equal to M.

A computer-readable medium comprising instructions encoded on the computer-readable medium that, upon execution, cause a controller within a device to:

• determine a first set of L cells of a plurality of cells of a non-volatile memory, wherein each cell of the first set is configured to store electric charge representing 2M voltage levels, wherein L and M are integers, wherein each of the plurality of voltage levels represents one of 2M values, and wherein each of the 2M values is represented by M digits;
• determine, based on L, M, and X, a second set of K cells of the plurality of cells, wherein K and X are integers and wherein K is not equal to L, wherein X represents a plurality of voltage levels in each cell of the second set of K cells;
• and
• store electric charge representing one of the X voltage levels in at least one cell of the second set of K cells, wherein the one of the X voltage levels represents a value comprising P digits, and wherein P is an integer or non-integer and not equal to M.