Method and apparatus for ESD protection
AssigneeAtmel Rousset S.A.S.
InventorsDavid Bernard, Jean-Jacques Kazazian, Antoine Riviere
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Abstract
A technique that minimizes false triggering of an electrostatic discharge (ESD) protection circuit is disclosed. In an embodiment, the resistor-capacitor (RC) time constant of an ESD trigger element is reduced during normal operation minimizing the risk of false triggering. Circuit layout area is saved without the need of a timeout circuit associated with releasing a device maintaining a trigger state (i.e., a trigger latch). A RC time constant for triggering is set in an operational context according to conditions of usage and desired application of the ESD protection circuit.
Claims12
An apparatus for providing electrostatic discharge (ESD) protection, the apparatus comprising:
- a trigger stage having a trigger capacitor coupled to a trigger resistor, the trigger stage being coupled to a first inverter, the first inverter configured to control only a trigger shunt device;
- the trigger stage being configured to respond to an ESD event;
- and
- a second inverter coupled to the trigger stage and the first inverter, and to a trigger latch to control an ESD shunt device;
- and
- wherein the trigger shunt device shunts the trigger resistor when an associated device coupled to the apparatus is powered.
An apparatus comprising:
- a capacitor and a resistor coupled in series between a power node and a ground node;
- a first inverter having an input coupled to a node between the capacitor and the resistor;
- a trigger shunt device having a gate coupled to an output of the first inverter, a drain coupled to the input of the first inverter, a source coupled to the ground node, and a region between the drain and the source coupled to the ground node, where the first inverter is configured to control only the trigger shunt device;
- a second inverter having an input coupled to the input of the first inverter;
- a latch coupled to an output of the second inverter;
- and
- an electrostatic discharge shunt device coupled to the latch and coupled between the power node and the ground node.
Dependencies are inferred from the claim text.