Pixel sensor cell with frame storage capability

A method of operating a semiconductor circuit comprising:

• providing a semiconductor circuit for an array of complementary metal oxide semiconductor (CMOS) image sensor pixels, wherein each of said CMOS image sensor pixels comprises:
• a photosensitive diode,
• a first transistor, wherein a source of said first transistor is directly connected to a terminal of said photosensitive diode,
• a second transistor, wherein a channel of the said second transistor is electrically coupled to a channel of the first transistor, and
• a plurality of frame transfer transistors serially connected to said second transistor and configured to store a plurality of frames therein;
• exposing an entirety of said array at least twice prior to reading data from said array, wherein a plurality of frames is stored in said plurality of frame transfer transistors, and wherein each of said plurality of frames corresponds to one of said multiple exposures;
• shifting said plurality of frames within said plurality of frame transfer transistors away from said photosensitive diode;
• and
• applying a common gate voltage to gate electrodes of every third frame transfer transistor among said plurality of frame transfer transistors or to gate electrodes of every fourth frame transfer transistor among said plurality of frame transfer transistors during said shifting of said plurality of frames.

A method of operating a semiconductor circuit comprising:

• providing a semiconductor circuit for an array of complementary metal oxide semiconductor (CMOS) image sensor pixels, wherein each of said CMOS image sensor pixels comprises:
• a photosensitive diode,
• a first transistor, wherein a source of said first transistor is directly connected to a terminal of said photosensitive diode,
• a second transistor, wherein a channel of the said second transistor is electrically coupled to a channel of the first transistor, and
• a plurality of frame transfer transistors serially connected to said second transistor and configured to store a plurality of frames therein;
• exposing an entirety of said array at least twice prior to reading data from said array, wherein a plurality of frames is stored in said plurality of frame transfer transistors, and wherein each of said plurality of frames corresponds to one of said multiple exposures;
• and
• transferring said plurality of frames to a pixel sensing circuit after said multiple exposures, wherein gates of every fourth frame transfer transistor among said plurality of frame transfer transistors are electrically shorted, and wherein gates of adjoining frame transfer transistors are electrically disconnected.

A method of operating a semiconductor circuit comprising:

• providing a semiconductor circuit for an array of complementary metal oxide semiconductor (CMOS) image sensor pixels, wherein each of said CMOS image sensor pixels comprises:
• a photosensitive diode,
• a first transistor, wherein a source of said first transistor is directly connected to a terminal of said photosensitive diode,
• a second transistor, wherein a channel of the said second transistor is electrically coupled to a channel of the first transistor, and
• a plurality of frame transfer transistors serially connected to said second transistor and configured to store a plurality of frames therein;
• exposing an entirety of said array at least twice prior to reading data from said array, wherein a plurality of frames is stored in said plurality of frame transfer transistors, and wherein each of said plurality of frames corresponds to one of said multiple exposures;
• and
• transferring said plurality of frames to a pixel sensing circuit after said multiple exposures, wherein gates of every third frame transfer transistor among said plurality of frame transfer transistors are electrically shorted, and wherein gates of adjoining frame transfer transistors are electrically disconnected.