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US 8,009,050 B2Granted
Wireless system, semiconductor device, and communication device
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorYoshiyuki Kurokawa
Life of this patent
Estimating the term…
Abstract
A highly reliable and inexpensive wireless system, which includes a communication device and a semiconductor device having a plurality of functional circuits with the same function, is provided. The semiconductor device transmits the processing results of the functional circuits to the communication device by a time-division system.
Claims15
A wireless system comprising:
- a semiconductor device;
- and
- a communication device,
- wherein the semiconductor device comprises a first functional circuit and a second functional circuit,
- wherein the first functional circuit is configured to perform a first operation and to generate first data,
- wherein the second functional circuit is configured to perform a second operation and to generate second data,
- wherein the semiconductor device is configured to sequentially transmit the first data and the second data,
- wherein the communication device comprises an arithmetic processing circuit and is configured to receive the first data and the second data, and
- wherein the arithmetic processing circuit is configured to perform a majority operation on the first data and the second data.
6 more elements
A wireless system comprising:
- a first semiconductor device;
- a second semiconductor device;
- and
- a communication device,
- wherein the first semiconductor device comprises a first functional circuit and is configured to transmit first data,
- wherein the first functional circuit is configured to perform a first operation and to generate the first data,
- wherein the second semiconductor device comprises a second functional circuit and is configured to transmit second data,
- wherein the second functional circuit is configured to perform a second operation and to generate the second data,
- wherein the communication device comprises an arithmetic processing circuit and configured to sequentially receive the first data and the second data, and
- wherein the arithmetic processing circuit is configured to perform a majority operation on the first data and the second data.
7 more elements
A semiconductor device comprising:
- a first functional circuit;
- a second functional circuit;
- a controller;
- and
- a transmission/reception circuit,
- wherein the first functional circuit is configured to store first data,
- wherein the second functional circuit is configured to store second data,
- wherein the controller is configured to read the first data from the first functional circuit and the second data from the second functional circuit and to send the first data and the second data to the transmission/reception circuit,
- wherein the transmission/reception circuit is configured to sequentially transmit the first data and the second data to a communication device and to receive third data from the communication device, and
- wherein the communication device is configured to receive the first data and the second data and perform a majority operation on the first data and the second data.
7 more elements
A communication device comprising:
- a transmission/reception circuit;
- and
- an arithmetic processing circuit,
- wherein the transmission/reception circuit is configured to sequentially receive first data and second data transmitted from a semiconductor device and to transmit third data to the semiconductor device, and
- wherein the arithmetic processing circuit is configured to perform a majority operation on the first data and the second data.
2 more elements
A communication device comprising:
- a transmission/reception circuit;
- and
- an arithmetic processing circuit,
- wherein the transmission/reception circuit is configured to sequentially receive first data transmitted from a first semiconductor device and second data transmitted from a second semiconductor device and to transmit third data to the first semiconductor device and the second semiconductor device, and
- wherein the arithmetic processing circuit is configured to perform a majority operation on the first data and the second data.
2 more elements
Dependencies are inferred from the claim text.