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US 8,008,968 B2Granted
Multipath amplifier
AssigneeTexas Instruments Incorporated
InventorDipankar Mandal
Life of this patent
Estimating the term…
Abstract
Because of variations in open loop gain and bandwidth in successive approximate register (SAR) analog-to-digital converters (ADCs), designing amplifiers with the desired characteristics is difficult. Here, a multipath amplifier is provided that accounts for the variations in open loop gain and bandwidth. Preferably, a number of cascaded amplifiers are provided that can auto-zero to account for offset voltages so as to allow the multipath amplifier to be stable over the desired open loop gains and bandwidths.
Claims17
An apparatus comprising:
- a first amplifier stage including:
- a first preamplifier having a plurality of input terminals and an output terminal, wherein at least one of the input terminals of the first preamplifier receives an input signal for the first amplifier stage;
- a first output amplifier having an input terminal and an output terminal, wherein the input terminal of the first output amplifier is coupled to the output terminal of the first preamplifier;
- a first switch that is coupled between the output terminal of the first output amplifier and at least one of the input terminals of the first preamplifier;
- and
- a first capacitor that is coupled to the first switch;
- and
- a second amplifier stage including:
- a second preamplifier having a plurality of input terminals and an output terminal, wherein at least one of the input terminals is coupled the output terminal of the first preamplifier stage;
- a second output amplifier having an input terminal and an output terminal, wherein the input terminal of the second output amplifier is coupled to the output terminal of the second preamplifier;
- a second switch that is coupled between the output terminal of the second output amplifier and at least one of the input terminals of the second preamplifier;
- and
- a second capacitor that is coupled to the second switch.
10 more elements
An apparatus comprising:
- a first amplifier having a first input terminal, a second input terminal, a first output terminal, and a second output terminal, wherein the first and second input terminals of the first amplifier receive an input signal;
- a second amplifier having a first input terminal, a second input terminal, a first output terminal, and a second output terminal, wherein the first output terminal of the second amplifier is coupled to the first output terminal of the first amplifier, and wherein the second output terminal of the second amplifier is coupled to the second output terminal of the first amplifier;
- a third amplifier having a first input terminal, a second input terminal, a first output terminal, and a second output terminal, wherein the first input terminal of the third amplifier is coupled to the first output terminal of the first amplifier, and wherein the second input terminal of the third amplifier is coupled to the second output terminal of the first amplifier;
- a first switch that is coupled between the first output terminal of the third amplifier and the first input terminal of the second amplifier;
- a second switch that is coupled between the second output terminal of the third amplifier and the second input terminal of the second amplifier;
- a fourth amplifier having a first input terminal, a second input terminal, a first output terminal, and a second output terminal, wherein the first input terminal of the fourth amplifier is coupled to the first output terminal of the first amplifier, and the second input terminal of the fourth amplifier is coupled to the second output terminal of the first amplifier;
- a fifth amplifier having a first input terminal, a second input terminal, a first output terminal, and a second output terminal, wherein first output terminal of the fifth amplifier is coupled to the first output terminal of the fourth amplifier, and wherein the second output terminal of the fifth amplifier is coupled to the second output terminal of fourth amplifier;
- a sixth amplifier having a first input terminal, a second input terminal, a first output terminal, and a second output terminal, wherein the first input terminal of the sixth amplifier is coupled to the first output terminal of the fourth amplifier, and wherein the second input terminal of the sixth amplifier is coupled to the second output terminal of the fourth amplifier;
- a third switch that is coupled between the first output terminal of the sixth amplifier and the first input terminal of the fifth amplifier;
- and
- a fourth switch that is coupled between the second output terminal of the and the second input terminal of the fifth amplifier.
8 more elements
An successive approximate register (SAR) analog-to-digital converter (ADC) comprising:
- an ADC;
- a DAC that is coupled to the ADC;
- a residue amplifier including:
- a first preamplifier having a plurality of input terminals and an output terminal, wherein at least one of the input terminals of the first preamplifier is coupled to the DAC;
- a first output amplifier having an input terminal and an output terminal, wherein the input terminal of the first output amplifier is coupled to the output terminal of the first preamplifier;
- a first switch that is coupled between the output terminal of the first output amplifier and at least one of the input terminals of the first preamplifier;
- and
- a first capacitor that is coupled to the first switch;
- and
- a second preamplifier having a plurality of input terminals and an output terminal, wherein at least one of the input terminals is coupled the output terminal of the first preamplifier stage;
- a second output amplifier having an input terminal and an output terminal, wherein the input terminal of the second output amplifier is coupled to the output terminal of the second preamplifier;
- a second switch that is coupled between the output terminal of the second output amplifier and at least one of the input terminals of the second preamplifier;
- and
- a second capacitor that is coupled to the second switch;
- and
- SAR logic that is coupled to the residue amplifier and to the DAC.
13 more elements
Dependencies are inferred from the claim text.