Integrated circuit with supply line intra-chip clock interface and methods for use therewith
AssigneeBroadcom Corporation
InventorAhmadreza (Reza) Rofougaran
Life of this patent
Estimating the term…
Abstract
An integrated circuit includes a first circuit and a plurality of first power supply lines for providing a first power to the first circuit. A first intra-chip clock interface generates a first clock signal on the first power supply lines. A plurality of second power supply lines are coupled to the plurality of first power supply lines and further couple a second power to the second circuit. A second intra-chip clock interface recovers the first clock signal from the second power supply lines. The second circuit operates based on the first clock signal.
Claims18
An integrated circuit comprising:
- a first circuit;
- a plurality of first power supply lines for providing a first power to the first circuit;
- and
- a first intra-chip clock interface coupled to the first power supply lines that generates a first clock signal on the first power supply lines;
- a second circuit that operates based on the first clock signal;
- a plurality of second power supply lines for coupling a second power to the second circuit;
- a high-pass filter for coupling the plurality of first power supply lines to the plurality of second power supply lines, wherein the high-pass filter passes the first clock signal;
- and
- a second intra-chip clock interface coupled to the second power supply lines that recovers the first clock signal from the second power supply lines.
An integrated circuit comprising:
- a first circuit;
- a plurality of first power supply lines for providing a first power to the first circuit;
- and
- a first intra-chip clock interface coupled to the first power supply lines that generates a first clock signal on the first power supply lines;
- a second circuit that operates based on the first clock signal;
- a plurality of second power supply lines, coupled to the plurality of first power supply lines for coupling a second power to the second circuit;
- and
- a second intra-chip clock interface coupled to the second power supply lines that recovers the first clock signal from the second power supply lines.
Dependencies are inferred from the claim text.