US 8,008,789 B2Granted

Substrate for a display panel, and a display panel having the same

AssigneeSharp Kabushiki Kaisha

InventorsTomoki Noda, Masanori Takeuchi, Kenji Enda

Life of this patent

Estimating the term…

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Abstract

A substrate for a display panel includes an alignment accuracy measurement mark which is used for measuring alignment accuracy between patterns on the substrate without decreasing an aperture ratio of a pixel. The substrate for a display panel includes the alignment accuracy measurement mark in an isolated configuration which is used for measuring alignment accuracy between a pattern of a gate signal line and an auxiliary capacitance line and a pattern of a source signal line and a drain line, where the alignment accuracy measurement mark has a shape such that at least one straight line portion is included, is formed in a layer where the pattern of the source signal line and the drain line is formed, and is positioned on the gate signal line.

Claims8

Dependent claims

A substrate for a display panel comprising:

a first layer including a first conductor pattern defining a gate signal line;
a second layer including a second conductor pattern defining a source signal line, the source signal line including at least one branch portion that extends in at least one direction in which the gate signal line extends;
an insulating layer arranged such that the first layer and the second layer are stacked with the insulating layer disposed therebetween on a surface of the substrate;
and
an isolated pattern that is included in the second layer and is electrically isolated from the source signal line;
wherein
the isolated pattern is spaced from the at least one branch portion of the source signal line along the at least one direction and is at least partially positioned above the gate signal line;
and the isolated pattern has a shape that includes a curved line portion.

5 more elements

Dependencies are inferred from the claim text.

Facts

Application: 12/981,699Filed 30 Dec 2010 · continuation
Priority: JP 2005-27564022 Sep 2005
Published: US 2011/0096284 A128 Apr 2011
Granted: 30 Aug 2011
Term ends: Not estimatedThe source records don’t support an estimate.

Classification6 codes

G02F 1/1362
Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit: active…
G02F 1/133354
Constructional arrangements; Manufacturing methods: arrangements for aligning or assembling substrates
G02F 1/136231
Active matrix addressed cells: for reducing the number of lithographic steps
Y10T 428/24802
Structurally defined web or sheet [e.g., overall dimension, etc.]: discontinuous or differential coating, impregnation or bond [e.g., artwork,…

Family

PCT/JP2006/318331Parent of this continuation · filed 15 Sep 2006
US 2011/0096284 A1Pre-grant publication · published 28 Apr 2011
Application12/067,518Parent of this continuation
US 2009/0236760 A1Published application
US 8,022,559 B2Related patent
US 8,008,789 B2This patent

From the US filing history. Foreign family members aren’t listed.