Semiconductor memory and method of manufacturing the same

A semiconductor memory, comprising:

• a plurality of stripe-shaped semiconductor layers stacked on a substrate, patterned in self-alignment with each other and extending parallel to the substrate, each of the semiconductor layers having one end and other end parallel to the substrate, the one end being a source, the other end being a drain;
• a gate electrode formed only on side surfaces of the semiconductor layers and extending perpendicular to the substrate;
• a plurality of cell transistors formed at intersections of the gate electrode and the side surfaces of the semiconductor layers and driven by the common gate electrode;
• and
• a plurality of layer selecting transistors selecting each of the semiconductor layers and being a tri-gate type, a gate electrode of each of the layer selecting transistors covering a top surface and side surfaces of a channel semiconductor.