US 8,008,730 B2Granted

Semiconductor device, and manufacturing method thereof

AssigneeRenesas Electronics Corporation

InventorsShoichi Fukui, Noboru Morimoto, Yasutaka Nishioka, Junko Izumitani, Atsushi Ishii

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Abstract

To provide a manufacturing method of a semiconductor device which can improve the reliability of the semiconductor device. A first insulating film for covering a semiconductor element formed in a semiconductor substrate is formed by a thermal CVD method or the like which has a good embedding property. A second insulating film is formed to cover the first insulating film by a plasma CVD method which has excellent humidity resistance. A plug is formed to penetrate the first insulating film and the second insulating film. A third insulating film comprised of a low-k film having a relatively low dielectric constant is formed over the second insulating film. A wiring is formed in the third insulating film by a damascene technique to be electrically coupled to the plug.

Claims11

Dependent claims

A manufacturing method of a semiconductor device, comprising the steps of:

forming a first gate electrode and a second gate electrode over a semiconductor substrate having a main surface, said first and second gate electrodes being spaced apart from each other;
forming a first interlayer insulating film in a region between the first gate electrode and the second gate electrode over the semiconductor substrate by at least one of a thermal chemical vapor deposition method and a coating method in such a manner that the first interlayer insulating film is at a higher level than those of the first gate electrode and the second gate electrode;
forming a second interlayer insulating film over the first interlayer insulating film by a plasma chemical vapor deposition method;
forming a first plug electrode through the second interlayer insulating film and the first interlayer insulating film, said first plug electrode being electrically coupled to the semiconductor substrate;
forming a third interlayer insulating film having a predetermined dielectric constant over the second interlayer insulating film by the plasma chemical vapor deposition method so as to cover the first plug electrode, a bottom portion of the third interlayer insulating film connecting to a top portion of the second interlayer insulating film;
forming a wiring trench for exposing the second interlayer insulating film and the first plug electrode by etching the third interlayer insulating film;
and
electrically coupling a wiring to the semiconductor substrate via the first plug electrode by forming the wiring in the wiring trench,
wherein in the step of forming the third interlayer insulating film, a silicon oxide carbide (SiOC) film or a silicon oxide fluoride (SiOF) film is formed as the third interlayer insulating film.

6 more elements

A semiconductor device, comprising:

a semiconductor substrate having a main surface;
a first gate electrode and a second gate electrode formed over the semiconductor substrate such that the first and second gate electrodes are spaced apart from each other;
a first interlayer insulating film formed in a region between the first gate electrode and the second gate electrode over the semiconductor substrate in such a manner that the first interlayer insulating film is at a higher level than those of the first gate electrode and the second gate electrode, said first interlayer insulating film having a predetermined content density of moisture and OH group, and said first interlayer insulating film having a predetermined dielectric constant;
a second interlayer insulating film formed over the first interlayer insulating film, said second interlayer insulating film having a content density of moisture and OH group lower than the predetermined content density, and said second interlayer insulating film having another predetermined dielectric constant;
a first plug electrode formed through the second interlayer insulating film and the first interlayer insulating film, said first plug electrode being electrically coupled to the semiconductor substrate;
a third interlayer insulating film formed over the second interlayer insulating film so as to cover the first plug electrode, said third interlayer insulating film being comprised of material having a further predetermined dielectric constant lower than the respective predetermined dielectric constants of the first and second interlayer insulating films, and lower than a dielectric constant of a silicon oxide film, said third interlayer insulating film having a content density of moisture and OH group lower than the predetermined content density, a bottom portion of the third interlayer insulating film connecting to a top portion of the second interlayer insulating film;
a wiring trench exposing the second interlayer insulating film and the first plug electrode through the third interlayer insulating film;
and
a wiring formed in the wiring trench and electrically coupled to the semiconductor substrate via the first plug electrode.

6 more elements

Dependencies are inferred from the claim text.

Facts

Application: 12/502,008Filed 13 Jul 2009
Priority: JP 2008-21704926 Aug 2008
Published: US 2010/0052062 A14 Mar 2010
Granted: 30 Aug 2011
Term ends: Not estimatedThe source records don’t support an estimate.

Classification11 codes

H10W 20/48
Characterised by their insulating parts: insulating materials thereof
H10W 20/071
Manufacture or treatment: of dielectric parts thereof
H10W 20/074
Of dielectric parts thereof: of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or…
H10W 20/092
Of dielectric parts thereof: by smoothing the dielectric parts