Non-volatile memory cell and non-volatile memory cell array with minimized influence from neighboring cells

A non-volatile memory cell array, comprising:

• a substrate;
• an element isolation unit to define a plurality of active regions in the substrate;
• a source and drain formed within each of the plurality of active regions in the substrate;
• a first oxide film formed on each of the plurality of active regions in the substrate;
• a plurality of charge storage units formed on the first oxide film;
• a plurality of second oxide films formed on the first oxide film, each of the second oxide films configured to circumferentially surround one of the plurality of charge storage units;
• and
• gate lines configured to circumferentially surround the plurality of second oxide films disposed on a signal processing line and electrically connect the plurality of second oxide films.

A non-volatile memory cell, comprising:

• a substrate;
• a first oxide film formed over an active region of the substrate;
• a source and drain formed within the active region of the substrate, the source and drain formed in a side by side planar orientation;
• a charge storage unit formed on the first oxide film and substantially perpendicular to the first oxide film, the charge storage unit being substantially cylindrical in shape;
• a second oxide film configured to circumferentially surround the charge storage unit and formed on the first oxide film;
• and
• a gate formed to on the second oxide film and configured to circumferentially surround at least a portion of the second oxide film that surrounds the charge storage unit.